Semiconductor light emitting device and method for manufacturing the same
View Patent ↗According to one embodiment, a semiconductor light emitting device includes: a semiconductor layer including a first face, a second face, a side face, and a light emitting layer; a p-side electrode provided on the second face; an n-side electrode provided on the side face; a first p-side metal layer provided on the p-side electrode; a first n-side metal layer provided on the periphery of the n-side electrode; a first insulating layer provided on a face on the second face side in the first n-side metal layer; a second p-side metal layer connected with the first p-side metal layer on the first p-side metal layer, and provided, extending from on the first p-side metal layer to on the first insulating layer; and a second n-side metal layer provided on a face on the second face side in the first n-side metal layer in a peripheral region of the semiconductor layer.
1. A semiconductor light emitting device, comprising:
a semiconductor layer including a first face, a second face opposite to the first face, a side face, and a light emitting layer;
a p-side electrode provided on the second face;
an n-side electrode provided on the side face;
a first p-side metal layer provided on the p-side electrode and connected electrically with the p-side electrode;
a first n-side metal layer provided in a region peripheral to the semiconductor layer and connected electrically with the n-side electrode, the first n-side metal layer having a first portion and a second portion that are at opposite sides of the first p-side metal layer;
a first insulating layer provided on the first portion of the first n-side metal layer;
a second p-side metal layer provided on the first p-side metal layer and connected electrically with the first p-side metal layer, the second p-side metal layer overlapping the first portion of the first n-side metal layer via the first insulating layer in a direction perpendicular to the first face; and
a second n-side metal layer provided on the second portion of the first n-side metal layer, the second n-side metal layer connected electrically to the first n-side metal layer.
2. The device according to claim 1 , further comprising:
a third p-side metal layer provided on the second p-side metal layer and being thicker than the second p-side metal layer; and
a third n-side metal layer provided on the second n-side metal layer and being thicker than the second n-side metal layer.
3. The device according to claim 2 , further comprising a second insulating layer provided on a side face of the third p-side metal layer and a side face of the third n-side metal layer.
4. The device according to claim 1 , further comprising a phosphor layer provided on the first face.
5. The device according to claim 4 , wherein the phosphor layer extends into the region peripheral to the semiconductor layer.
6. The device according to claim 4 , wherein a part of the n-side electrode protrudes from the side face beyond the first face, and surrounds a periphery of the phosphor layer on the first face.
7. The device according to claim 6 , wherein the first n-side metal layer connected electrically with the n-side electrode is also provided on a periphery of the part of the n-side electrode.
8. The device according to claim 1 , wherein the first p-side metal layer covers the whole region of a light emitting region including the light emitting layer.
9. The device according to claim 1 , wherein:
the device includes a plurality of the semiconductor layers separated from each other; and
the n-side electrodes provided on the side faces between the plurality of semiconductor layers are connected electrically with each other.
10. The device according to claim 9 , wherein the first n-side metal layer is provided between adjacent side faces of the plurality of semiconductor layers.
11. The device according to claim 10 , wherein the first n-side metal layer surrounds continuously a periphery of each of the semiconductor layers.
12. The device according to claim 9 , wherein a surface of the n-side electrode provided between adjacent side faces of the plurality of semiconductor layers is covered with an insulating film and, on the insulating film, the first p-side metal layer is provided.
13. The device according to claim 9 , wherein the first p-side metal layer is provided continuously between the plurality of semiconductor layers.
14. The device according to claim 9 , wherein the second p-side metal layer is provided continuously between the plurality of semiconductor layers.
15. The device according to claim 1 , further comprising a varistor provided between the first n-side metal layer and the second p-side metal layer in the peripheral region, the varistor having a first electrode connected electrically with the first n-side metal layer and a second electrode connected electrically with the second p-side metal layer.
16. The device according to claim 1 , wherein the first n-side metal layer surrounds continuously a periphery of the n-side electrode.
17. The device according to claim 1 , wherein the first n-side metal layer is thicker than the semiconductor layer.