Semiconductor storage device and driving method thereof

1. A semiconductor storage device comprising:

a plurality of local word lines;

a plurality of bit lines intersecting the local word lines;

a plurality of memory segments each including a plurality of nonvolatile memory cells provided to correspond to intersections between the local word lines and the bit lines, each of the memory segments being provided to correspond to a plurality of the local word lines;

a sense amplifier provided to correspond to a plurality of the bit lines;

a global word line provided to correspond to a plurality of the local word lines, and configured to be commonly driven in the memory segments;

a decoder connected between the global word line and the local word lines corresponding to the global word line, and configured to selectively drive a certain local word line from the local word lines;

a segment controller provided in each of the memory segments, and configured to select one of the memory segments to be driven; and

an input/output part configured to output read data from the memory segments or to receive write data to the memory segments, wherein

during a read operation in which the sense amplifier reads out a certain page data, the segment controller and the decoder change the local word line selected in a second memory segment among the memory segments without changing the global word line selected in the second memory segment, when read data from a first memory segment among the memory segments is output from the input/output part.

2. The device of claim 1 , further comprising an address register configured to receive a global address designating the global word line, a local address designating one of the local word lines, and a segment address designating one of the memory segments from the input/output part and to temporarily hold the global address, the local address, and the segment address, wherein

a certain memory segment is selected from the memory segments based on the segment address, and the segment controller corresponding to the selected memory segment operates independently, and

in the selected memory segment, the decoder selectively drives a certain local word line from the local word lines based on the global address and the local address.

3. The device of claim 1 , wherein during a write operation of a certain page data, the segment controller and the decoder change the local word line selected in a second memory segment among the memory segments without changing the global word line selected in the second memory segment, when write data to the first memory segment is input to the input/output part.

4. The device of claim 2 , wherein during a write operation of a certain page data, the segment controller and the decoder change the local word line selected in a second memory segment among the memory segments without changing the global word line selected in the second memory segment, when write data to the first memory segment is input to the input/output part.

5. The device of claim 3 , wherein the segment controller and the decoder change the local word line selected in the first memory segment when read data from the second memory segment is output from the input/output part or when write data to the second memory segment is input to the input/output part.

6. The device of claim 4 , wherein the segment controller and the decoder change the local word line selected in the first memory segment when read data from the second memory segment is output from the input/output part or when write data to the second memory segment is input to the input/output part.

7. The device of claim 2 , further comprising a multiplexer provided between the bit lines and the sense amplifier, the multiplexer being configured to connect a bit line selected from the bit lines to the sense amplifier, wherein

during a data read operation or a data write operation, the multiplexer fixes a bit line to be connected to the sense amplifier among the bit lines.

8. The device of claim 3 , further comprising a multiplexer provided between the bit lines and the sense amplifier, the multiplexer being configured to connect a bit line selected from the bit lines to the sense amplifier, wherein

during a data read operation or a data write operation, the multiplexer fixes a bit line to be connected to the sense amplifier among the bit lines.

9. The device of claim 1 , further comprising a multiplexer provided between the bit lines and the sense amplifier, the multiplexer being configured to connect a bit line selected from the bit lines to the sense amplifier, wherein

during a data read operation or a data write operation, the multiplexer changes the bit line to be connected to the sense amplifier in a second memory segment among the memory segments when read data from a first memory segment among the memory segment is output from the input/output part or when write data to the first memory segment is input to the input/output part.

10. The device of claim 9 , wherein during a data read operation or a data write operation, the multiplexer changes the bit line to be connected to the sense amplifier in the first memory segment when read data from the second memory segment is output from the input/output part or when write data to the second memory segment is input to the input/output part.

11. The device of claim 9 , wherein during a data read operation or a data write operation, the decoder fixes a local word line to be selected from the local word lines.

12. The device of claim 10 , wherein during a data read operation or a data write operation, the decoder fixes a local word line to be selected from the local word lines.

13. A driving method of a semiconductor storage device, the device comprising: a plurality of local word lines; a plurality of bit lines intersecting the local word lines; a plurality of memory segments each including a plurality of nonvolatile memory cells provided to correspond to intersections between the local word lines and the bit lines, each of the memory segments being provided to correspond to a plurality of the local word lines; a sense amplifier provided to correspond to a plurality of the bit lines; a global word line provided to correspond to a plurality of the local word lines, the global word line being configured to be commonly driven in the memory segments; a decoder connected between the global word line and the local word lines corresponding to the global word line, and configured to selectively drive a certain local word line from the local word lines; a segment controller provided in each of the memory segments, and configured to select one of the memory segments to be driven; an input/output part configured to output read data from the memory segments or to receive write data to the memory segments; and an address register configured to receive a global address designating the global word line, a local address designating one of the local word lines, and a segment address designating one of the memory segments from the input/output part and to temporarily hold the global address, the local address, and the segment address,

the method comprising:

selecting a certain memory segment from the memory segments based on the segment address, and independently operating the segment controller corresponding to the selected memory segment;

in the selected memory segment, selectively driving a certain local word line from the local word lines based on the global address and the local address; and

changing the local word line selected in a second memory segment among the memory segments without changing the global word line selected in the second memory segment, when read data from a first memory segment among the memory segments is output from the input/output part during a read operation in which the sense amplifier reads out a certain page data.

14. The method of claim 13 , further comprising changing the local word line selected in a second memory segment among the memory segments when write data to the first memory segment is input to the input/output part during a data write operation.

15. The method of claim 14 , further comprising changing the local word line selected in the first memory segment when read data from the second memory segment is output from the input/output part or when write data to the second memory segment is input to the input/output part.

16. The method of claim 13 , wherein a bit line connected to the sense amplifier among the bit lines is fixed during a data read operation or a data write operation.

17. The device of claim 1 , wherein an active command issued in the read operation of the page data includes an upper active command for selection of the global word line and a lower active command for selection of the local word line.

18. The device of claim 17 , wherein a page space of a first page data read by a certain active command is different from a second page space of a second page data read by another active command.