SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

1 . A semiconductor device comprising:

a first semiconductor layer formed on a substrate;

a second semiconductor layer formed on the first semiconductor layer;

a third semiconductor layer formed on the second semiconductor layer;

a gate electrode formed on the third semiconductor layer; and

a source electrode and a drain electrode formed in contact with the second semiconductor layer,

wherein a semiconductor material of the third semiconductor layer is doped with a p-type impurity element; and

the third semiconductor layer has a jutting out region that juts out beyond an edge of the gate electrode toward a side where the drain electrode is provided.

2 . The semiconductor device according to claim 1 ,

wherein the jutting out region has a width equal to or larger than 100 nm in a direction toward the drain electrode; and

the width is equal to or less than 0.8×D, where D is a distance between the gate electrode and the drain electrode.

3 . The semiconductor device according to claim 1 ,

wherein the third semiconductor layer is thinner in the jutting out region than a region above which the gate electrode is formed.

4 . The semiconductor device according to claim 3 ,

wherein a thickness of the jutting out region is equal to or larger than 10 nm.

5 . The semiconductor device according to claim 1 ,

wherein a thickness of the third semiconductor layer in the jutting out region gradually decreases as a distance from an edge of a region where the gate electrode is formed increases toward a side where the drain electrode is formed.

6 . The semiconductor device according to claim 1 ,

wherein an insulation film is provided between the third semiconductor layer and the gate electrode.

7 . The semiconductor device according to claim 6 ,

wherein the insulation film is formed from aluminum oxide.

8 . The semiconductor device according to claim 1 ,

wherein the p-type impurity element is Mg.

9 . The semiconductor device according to claim 1 ,

wherein the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer are formed from respective nitride semiconductors.

10 . The semiconductor device according to claim 1 ,

wherein the semiconductor material of the third semiconductor layer is a material including GaN.

11 . The semiconductor device according to claim 1 ,

wherein the first semiconductor layer is formed from a material including GaN.

12 . The semiconductor device according to claim 1 ,

wherein the second semiconductor layer is formed from a material including AlGaN.

13 . A power supply comprising the semiconductor device,

wherein a semiconductor device includes:

a first semiconductor layer formed on a substrate;

a second semiconductor layer formed on the first semiconductor layer;

a third semiconductor layer formed on the second semiconductor layer;

a gate electrode formed on the third semiconductor layer; and

a source electrode and a drain electrode formed in contact with the second semiconductor layer,

wherein a semiconductor material of the third semiconductor layer is doped with a p-type impurity element; and

the third semiconductor layer has a jutting out region that juts out beyond an edge of the gate electrode toward a side where the drain electrode is provided.

14 . An amplifier comprising the semiconductor device,

wherein a semiconductor device includes:

a first semiconductor layer formed on a substrate;

a second semiconductor layer formed on the first semiconductor layer;

a third semiconductor layer formed on the second semiconductor layer;

a gate electrode formed on the third semiconductor layer; and

a source electrode and a drain electrode formed in contact with the second semiconductor layer,

wherein a semiconductor material of the third semiconductor layer is doped with a p-type impurity element; and

the third semiconductor layer has a jutting out region that juts out beyond an edge of the gate electrode toward a side where the drain electrode is provided.

15 . A method of manufacturing a semiconductor device, comprising:

sequentially depositing a first semiconductor layer and a second semiconductor layer on a substrate;

forming a third semiconductor layer on the second semiconductor layer at a predetermined region, the third semiconductor layer including a p-type impurity element;

forming a source electrode and a drain electrode in contact with the second semiconductor layer; and

forming a gate electrode on the third semiconductor layer;

wherein an edge of the third semiconductor layer on a drain electrode side is formed closer to the drain electrode than an edge of the gate electrode on the drain electrode side.

16 . The method of manufacturing a semiconductor device according to claim 15 ,

wherein the forming of the third semiconductor layer includes: depositing a film including the p-type impurity element on the second semiconductor layer; and

subsequently removing the film including the p-type impurity element from a region except the predetermined region.

17 . The method of manufacturing a semiconductor device according to claim 15 ,

wherein, in the third semiconductor layer, a region where the gate electrode is not formed on the drain electrode side is a jutting out region,

the method further comprising, after the forming of the third semiconductor layer, thinning a thickness of the third semiconductor layer in the jutting out region compared to a thickness of a region directly below the gate electrode.

18 . The method of manufacturing a semiconductor device according to claim 15 ,

wherein, a region of the third semiconductor layer on the drain electrode side, where the gate electrode is not formed, is a jutting out region; and

after the forming of the third semiconductor layer, a portion of the third semiconductor layer is removed by dry etching in which ions are obliquely injected with respect to the substrate in such a way that a thickness of the third semiconductor layer gradually decreases as a position moves from a side where the gate electrode is provided to a side where the drain electrode is provided.

19 . The method of manufacturing a semiconductor device according to claim 15 , further comprising:

forming an insulation film on the third semiconductor layer;

wherein the gate electrode is formed above the third semiconductor layer with having the insulation film in between.

20 . The method of manufacturing a semiconductor device according to claim 15 ,

wherein the p-type impurity element is Mg.