IP Library › Granted Patent US 8,766,334
Granted Patent B2
US 8,766,334 · App. 13/602,704 · Granted Jul 1, 2014

Semiconductor device with low resistance gate electrode and method of manufacturing the same

Inventor: Yoshinori Tsuchiya (Kanagawa, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,766,334
App. No.
13/602,704
Granted
Jul 1, 2014
Kind
B2
Abstract

A semiconductor device of an embodiment includes: a substrate formed of a single-crystal first semiconductor; a gate insulating film on the substrate; a gate electrode including a layered structure of a semiconductor layer formed of a polycrystalline second semiconductor and a metal semiconductor compound layer formed of a first metal semiconductor compound that is a reaction product of a metal and the second semiconductor; and electrodes formed of a second metal semiconductor compound that is a reaction product of the metal and the first semiconductor, and formed on the substrate with the gate electrode interposed therebetween, and an aggregation temperature of the first metal semiconductor compound on the polycrystalline second semiconductor is lower than an aggregation temperature of the second metal semiconductor compound on the single-crystal first semiconductor, and a cluster-state high carbon concentration region is included in an interface between the semiconductor layer and the metal semiconductor compound layer.

Claims (28)

1. A semiconductor device comprising:

a substrate formed of a single-crystal silicon carbide first semiconductor;

a gate insulating film formed on the substrate;

a gate electrode including a layered structure of a semiconductor layer formed of a polycrystalline silicon second semiconductor and formed on the gate insulating film, and a metal semiconductor compound layer formed of a first metal semiconductor compound that is a reaction product of a metal and the second semiconductor; and

electrodes formed of a second metal semiconductor compound that is a reaction product of the metal and the first semiconductor, and formed on the substrate with the gate electrode interposed therebetween,

wherein an aggregation temperature of the first metal semiconductor compound on the polycrystalline silicon second semiconductor is lower than an aggregation temperature of the second metal semiconductor compound on the single-crystal silicon carbide first semiconductor, and

a cluster-state high carbon concentration region is included in an interface between the semiconductor layer and the metal semiconductor compound layer.

2. The device according to claim 1 , wherein the metal is nickel.

3. The device according to claim 1 , wherein an average of diameters of the cluster-state high carbon concentration region is 1 nm or more and 30 nm or less.

4. The device according to claim 1 , wherein a surface density of the cluster-state high carbon concentration region at the interface is 1×10 10 cm −2 or more and 1×10 15 cm −2 or less.

5. The device according to claim 1 , wherein a surface density of the cluster-state high carbon concentration region at the interface is larger than a surface density of crystal grains of the first metal semiconductor compound.

6. A method of manufacturing the semiconductor device of claim 1 , the method comprising:

performing ion implantation of carbons into the polycrystalline silicon second semiconductor layer;

performing a first heat treatment to cluster the carbons in the polycrystalline silicon second semiconductor layer;

forming a metal film on the polycrystalline silicon second semiconductor layer; and

performing a second heat treatment to cause a reaction between the polycrystalline silicon second semiconductor layer and the metal film to form the metal semiconductor compound layer.

7. The method according to claim 6 , wherein a temperature of the first heat treatment is 700° C. or more and 1200° C. or less.

8. The method according to claim 6 , wherein a dose amount of the carbons in the ion implantation of the carbons is 1e13 cm −2 or more and 5e16 cm −2 or less.

9. A method of manufacturing the semiconductor device of claim 1 , the method comprising:

forming the gate insulating film on the silicon carbide substrate;

forming the polycrystalline silicon second semiconductor layer on the gate insulating film;

performing ion implantation of carbons into the polycrystalline silicon second semiconductor layer;

performing a first heat treatment to cluster the carbons in the polycrystalline silicon second semiconductor layer;

patterning the polycrystalline silicon second semiconductor layer;

forming a metal film on the polycrystalline silicon second semiconductor layer and on the silicon carbide substrate; and

performing a second heat treatment to cause a reaction between the polycrystalline silicon second semiconductor layer and the metal film to form a first metal silicide film, and to cause a reaction between the silicon carbide substrate and the metal film to form a second metal silicide film.

10. The method according to claim 9 , wherein the metal film is a nickel film.

11. The method according to claim 9 , wherein a temperature of the first heat treatment is 700° C. or more and 1200° C. or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2012
From: TSUCHIYA, YOSHINORI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 029208/0381 →
Priority Claims (1)
JP 2012-046253 · Mar 2, 2012 · national
Continuity (1)
Related Publication 20130234159A1 · Sep 12, 2013