Attenuating antenna switch and communication device
An attenuating antenna switch may be used to suppress increase in the scale and power consumption of an RFIC. The antenna switch has a first terminal, a second terminal, and an antenna terminal coupled to the first and second terminals and configured to be connected to an antenna. The first switch switches between a first state in which a high frequency signal is propagated between the first terminal and the antenna terminal, and a second state in which the high frequency signal is interrupted. A second switch switches between the first and second states between the second terminal and the antenna terminal. The first and second switches are controlled in a mutually exclusive manner such that only one of the two switches can be in the first state at any given time. When in the first state, each switch adjusts an attenuation amount of the high frequency signal.
1. An attenuating antenna switch having at least two mutually exclusive attenuating signal paths therethrough, comprising:
a first terminal, a second terminal and an antenna terminal;
a first switch connected between the first terminal and the antenna terminal;
a second switch connected between the second terminal and the antenna terminal;
wherein:
in response to first control signals:
the first switch is configured to attenuate a first signal passing between the first terminal and the antenna terminal by a first attenuation amount, and
the second switch is configured to suppress said first signal from leaking between the antenna terminal and the second terminal; and
in response to second control signals:
the second switch is configured to attenuate a second signal passing between the second terminal and the antenna terminal by a second attenuation amount, and
the first switch is configured to suppress said second signal from leaking between the antenna terminal and the first terminal.
2. The attenuating antenna switch according to claim 1 , wherein:
the first switch comprises a first FET series block including a first plurality of FETs (Field Effect Transistors) coupled in series between the first terminal and the antenna terminal, and a first FET shunt block including a second plurality of FETs coupled in series between the first terminal and a ground point, and
the second switch comprises a second FET series block including a third plurality of FETs (Field Effect Transistors) coupled in series between the second terminal and the antenna terminal, and a second FET shunt block including a fourth plurality of FETs coupled in series between the second terminal and the ground point.
3. The attenuating antenna switch according to claim 2 , wherein:
gates of the FETs in the first FET series block are configured to be controlled by individual first series control voltages;
gates of the FETs in the first FET shunt block are configured to be controlled by a common first shunt control voltage;
gates of the FETs in the second FET series block are configured to be controlled by individual second series control voltages;
gates of the FETs in the second FET shunt block are configured to be controlled by a common second shunt control voltage.
4. The attenuating antenna switch according to claim 2 , wherein:
gates of the FETs in the first FET series block are configured to be controlled by a common first series control voltage;
gates of the FETs in the first FET shunt block are configured to be controlled by a common first shunt control voltage;
gates of the FETs in the second FET series block are configured to be controlled by a common second series control voltage; and
gates of the FETs in the second FET shunt block are configured to be controlled by a common second shunt control voltage.
5. The attenuating antenna switch according to claim 2 , wherein:
gates of the FETs in the first FET series block are configured to be controlled by a common first series control voltage;
gates of the FETs in the first FET shunt block are configured to be controlled by individual first shunt control voltages;
gates of the FETs in the second FET series block are configured to be controlled by a common second series control voltage;
gates of the FETs in the second FET shunt block are configured to be controlled by individual second shunt control voltages.
6. The attenuating antenna switch according to claim 2 , wherein:
gates of the FETs in the first FET series block are configured to be controlled by individual first series control voltages;
gates of the FETs in the first FET shunt block are configured to be controlled by individual first shunt control voltages;
gates of the FETs in the second FET series block are configured to be controlled by individual second series control voltages;
gates of the FETs in the second FET shunt block are configured to be controlled by individual second shunt control voltages.
7. The attenuating antenna switch according to claim 2 , wherein:
in response to the first control signals, a first number of FETs in the first FET series block are off and a second number of FETs in the first FET series block are on; and
the first attenuation amount is determined, at least in part, by the number of FETs that are off.
8. The attenuating antenna switch according to claim 7 , wherein:
the first control signals apply different voltages to each of the gates of the FETs in the first FET series block that are on, and
the first attenuation amount is further determined, at least in part, by values of said different voltages.
9. The attenuating antenna switch according to claim 7 , wherein:
in response to the first control signals, a third number of FETs in the first FET shunt block are off and a fourth number of FETs in the first FET shunt block are on.
10. The attenuating antenna switch according to claim 2 , wherein:
in response to the first control signals, all the FETs in the first FET series block are on.
11. The attenuating antenna switch according to claim 10 , wherein:
the first control signals apply a common first series control voltage to gates of all the FETs in the first FET series block; and
the first attenuation amount is determined, at least in part, by a value of said common first series control voltage.
12. The attenuating antenna switch according to claim 10 , wherein:
in response to the first control signals, a third number of FETs in the first FET shunt block are off and a fourth number of FETs in the first FET shunt block are on.
13. The attenuating antenna switch according to claim 12 , wherein:
the first control signals apply a common first series control voltage to gates of all the FETs in the first FET series block; and
the first attenuation amount is determined, at least in part, by a value of said common first series control voltage.
14. The attenuating antenna switch according to claim 1 ,
wherein the first switch comprises:
a first FET parallel network comprising, in parallel, a plurality of FET series blocks, each FET series block including a first plurality of FETs coupled in series between the first terminal and the antenna terminal, and
a first FET shunt block including a second plurality of FETs coupled in series between the first terminal and a ground point; and
wherein the second switch comprises:
a second FET parallel network comprising, in parallel, a plurality of FET series blocks, each FET series block including a first plurality of FETs coupled in series between the first second and the antenna terminal, and
a second FET shunt block including a second plurality of FETs coupled in series between the second terminal and the ground point.
15. The attenuating antenna switch according to claim 14 , wherein:
in response to said first control signals, a first number of FETs in the first FET parallel network are on and a second number of FETs in the first FET parallel network are off, thereby determining, at least in part, the first attenuation amount; and
in response to said second control signals, a third number of FETs in the second FET parallel network are on and a fourth number of FETs in the second FET parallel network are off, thereby determining, at least in part, the second attenuation amount.
16. A cellular phone comprising:
the attenuating antenna switch according to claim 1 ;
an antenna connected to the antenna terminal of the antenna switch; and
a transmission/reception circuit having a first circuit terminal connected to the first terminal of the antenna switch and a second circuit terminal connected to the second signal of the antenna switch, the transmission/reception circuit configured to provide said control signals to the antenna switch in response to at least one predetermined condition.
17. The cellular phone according to claim 16 , wherein:
the transmission/reception circuit is configured to provide said control signals to the antenna switch in response to a measurement of received signal strength to adjust at least one of the first attenuation amount and the second attenuation amount so as to control a power level of a signal received from or sent to the antenna switch so that said power level is within a dynamic range of transmission/reception circuit.
18. The cellular phone according to claim 17 , wherein:
the transmission/reception circuit comprises a radio frequency integrated circuit (RFIC) and a baseband circuit;
the RFIC is configured to provide the control signals to the antenna switch so that said power level is within a dynamic range of the RFIC.
19. The cellular phone according to claim 17 , wherein:
the cellular phone is configured to selectively operate in more than one frequency band; and
the transmission/reception circuit is configured to provide said control signals to the antenna switch in accordance with a frequency band in which the cellular phone is operating.
20. The cellular phone according to claim 17 , wherein:
the cellular phone is configured to operate according to a time division duplex method having transmission periods and reception periods; and
the transmission/reception circuit is configured to provide the first control signals for transmission periods and provide the second control signals for reception periods.