Predistortion circuit, wireless communication unit and method for coefficient estimation
A predistortion circuit is for providing distortion correction in a presence of harmonics. The predistortion circuit includes an input for receiving a digital input signal; an output for providing a digital output signal to an up-conversion element that produces harmonic terms operably coupled to a non-linear device; and a processor operably coupled to an output of the non-linear device for receiving an output radio frequency signal therefrom and arranged to determine a digital correction to be applied to the digital input signal. The processor is further arranged to determine the digital correction that includes a plurality of in-phase and quadrature cross-terms of the digital input signal where terms of a same order have different co-efficients.
1. A predistortion circuit for providing distortion correction in a presence of harmonics, the predistortion circuit comprising:
an input for receiving a digital input signal;
an output for providing a digital output signal to an up-conversion element that produces harmonic terms comprising a plurality of different frequencies, wherein the up-conversion element is operably coupled to a non-linear device, and the digital output signal is a predistorted version of the digital input signal;
a processor operably coupled to an output of the non-linear device for receiving an output radio frequency signal therefrom and arranged to determine a digital correction to be applied to the digital input signal;
wherein the processor is further arranged to:
determine the digital correction that comprises a plurality of in-phase and quadrature cross-terms of the digital input signal containing products of in-phase and quadrature terms, where terms of a same order have different co-efficients, wherein the digital output signal carries predistorted samples, and the predistorted samples are generated based on the plurality of in-phase and quadrature cross-terms;
wherein the digital correction is generated from a row vector of N cross terms (Y i ) and two column vectors of N respective different co-efficients (γ, λ) and applied to respective in-phase correction and quadrature correction of the form:
I o =Y i ·γ
Q o =Y i ·λ
where: Y i =[I i Q i I i 3 Q i 3 I i ·Q i 2 Q i ·I i 2 I i 5 Q i 5 I i ·Q i 4 Q i ·I i 4 I i 3 ·Q i 2 Q i 3 ·I i 2 . . . ];
wherein N is a positive integer that is greater than one; and the plurality of different co-efficients to be applied to each odd order harmonic term comprises a symmetrical relationship between the in-phase correction co-efficient and the quadrature correction co-efficient.
2. The predistortion circuit of claim 1 wherein the predistortion circuit further comprises a predistorter for receiving the digital correction from the processor and applying the correction to the digital input signal.
3. The predistortion circuit of claim 2 wherein the non-linear device is a wideband non-linear amplifier such that the output radio frequency signal comprises harmonic terms produced by the up conversion element.
4. The predistortion circuit of claim 1 wherein the up-conversion element is at least one of a group comprising: a passive mixer, a hard-switched mixer.
5. The predistortion circuit of claim 1 wherein the processor is further arranged to determine the digital correction that additionally utilises at least one memory effect of the non-linear device.
6. A wireless communication unit comprising a predistortion circuit comprising:
a mixer for receiving a digital output signal which is a predistorted version of a digital input signal;
at least one non-linear device operably coupled to the mixer for receiving a mixer output signal that comprises a plurality of harmonic terms comprising a plurality of different frequencies, and producing a non-linear output signal therefrom; and
a processor operably coupled to an output of the non-linear device for receiving an output radio frequency signal therefrom and arranged to determine a digital correction to be applied to the digital input signal;
wherein the processor is further arranged to:
determine the digital correction that comprises a plurality of in-phase and quadrature cross-terms of the digital input signal containing products of in-phase and quadrature terms, where terms of a same order have different co-efficients, wherein the digital output signal carries predistorted samples, and the predistorted samples are generated based on the plurality of in-phase and quadrature cross-terms;
wherein the digital correction is generated from a row vector of N cross terms (Y i ) and two column vectors of N respective different co-efficients (γ, λ) and applied to respective in-phase correction and quadrature correction of the form:
I o =Y i ·γ
Q o =Y i ·λ
where: Y i =[I i Q i I i 3 Q i 3 I i ·Q i 2 Q i ·I i 2 I i 5 Q i 5 I i ·Q i 4 Q i ·I i 4 I i 3 ·Q i 2 Q i 3 ·I i 2 . . .];
wherein N is a positive integer that is greater than one; and
the plurality of different co-efficients to be applied to each odd order harmonic term comprises a symmetrical relationship between the in-phase correction co-efficient and the quadrature correction co-efficient.
7. The wireless communication unit of claim 6 wherein the predistortion circuit further comprises a predistorter for receiving the digital correction from the processor and applying the correction to the digital input signal.
8. The wireless communication unit of claim 7 wherein the non-linear device is a wideband non-linear amplifier such that the output radio frequency signal comprises harmonic terms produced by the up conversion element.
9. The wireless communication unit of claim 6 wherein the up-conversion element is at least one of a group comprising: a passive mixer, a hard-switched mixer.
10. The wireless communication unit of claim 6 wherein the processor is further arranged to determine the digital correction that additionally utilises at least one memory effect of the non-linear device.
11. A method for correcting harmonic distortion in a circuit, the method comprising:
receiving a digital input signal;
providing a digital output signal to a mixer operably coupled to a non-linear device, wherein the digital output signal is a predistorted version of the digital input signal;
receiving an output radio frequency signal therefrom;
determining a digital correction to be applied to the digital input signal;
determining whether the digital correction comprises a plurality of in-phase and quadrature cross-terms of the digital input signal containing products of in-phase and quadrature terms, where terms of a same order have different co-efficients, wherein the digital output signal carries predistorted samples, and the predistorted samples are generated based on the plurality of in-phase and quadrature cross-terms; and
generating the digital correction from a row vector of N cross terms (Y i ) and two column vectors of N respective different co-efficients (γ, λ) and applying the digital correction to respective in-phase correction and quadrature correction of the form:
I o =Y i ·γ
Q o =Y i ·λ
where: Y i =[I i Q i I i 3 Q i 3 I i ·Q i 2 Q i ·I i 2 I i 5 Q i 5 I i ·Q i 4 Q i ·I i 4 I i 3 ·Q i 2 Q i 3 ·I i 2 . . .];
wherein N is a positive integer that is greater than one; and
the plurality of different co-efficients to be applied to each odd order harmonic term comprises a symmetrical relationship between the in-phase correction co-efficient and the quadrature correction co-efficient.
12. The method of claim 11 wherein the predistortion circuit further comprises a predistorter for receiving the digital correction from the processor and applying the correction to the digital input signal.
13. The wireless communication unit of claim 12 wherein the non-linear device is a wideband non-linear amplifier such that the output radio frequency signal comprises harmonic terms produced by the up conversion element.
14. The method of claim 11 further comprising determining the digital correction that additionally utilises at least one memory effect of the non-linear device.