Transistors with immersed contacts
View Patent ↗Embodiments of a semiconductor structure include a first current electrode region, a second current electrode region, and a channel region. The channel region is located between the first current electrode region and the second current electrode region, and the channel region is located in a fin structure of the semiconductor structure. A carrier transport in the channel region is generally in a horizontal direction between the first current electrode region and the second current electrode region. A contact extends into the first current electrode region and is electrically coupled to the first current electrode region.
1. A semiconductor device comprising:
a substrate;
an electrode structure on the substrate, wherein the electrode structure includes a first current electrode region and an opening that extends from a top surface of the electrode structure to the substrate; and
a first contact, wherein the first contact is formed within the opening and extends into the first current electrode region to the substrate, the first contact is electrically coupled to the first current electrode region, and sidewalls of a portion of the first contact that is present within the opening are completely surrounded by the electrode structure.
2. The semiconductor device of claim 1 , wherein the first current electrode region is of a semiconductor structure, the semiconductor structure further includes:
a second current electrode region; and
a channel region located in the semiconductor structure between the first current electrode region and the second current electrode region, the channel region located in a fin structure of the semiconductor structure.
3. The semiconductor device of claim 2 , further comprising:
a second contact electrically coupled to the second current electrode region, the second contact extending into the second current electrode region of the semiconductor structure.
4. The semiconductor device of claim 2 , wherein:
the first semiconductor structure includes a plurality of fin structures;
the plurality of fin structures includes the fin structure;
each of the plurality of fin structures includes a channel region;
each of the plurality of fin structures is located between a first structure of the semiconductor structure and a second structure of the semiconductor structure;
at least a portion of the first current electrode region is located in the first structure and at least a portion of the second current electrode region is located in the second structure; and
the first contact extends into the first structure.
5. The semiconductor device of claim 1 , wherein the electrode structure is located on an insulator, and the first contact extends to the insulator.
6. The semiconductor device of claim 1 , wherein the first contact includes a barrier layer.
7. The semiconductor device of claim 1 , wherein the first contact extends into an opening of the electrode structure, the opening having a sidewall, wherein the sidewall includes a silicide located thereon, wherein the silicide is in electrical contact with the first contact.
8. A semiconductor device comprising:
a semiconductor structure on a substrate, wherein the semiconductor structure comprises a first current electrode region, a second current electrode region, and a fin structure between the first current electrode region and the second current electrode region, wherein a channel region is located in the fin structure;
a gate structure formed over the fin structure and the substrate; and
a first contact within a first opening in the first current electrode region that extends to the substrate, wherein sidewalls of a portion of the first contact located within the first opening are completely surrounded by the first current electrode region, and the first contact is electrically coupled to the first current electrode region.
9. The semiconductor device of claim 8 , further comprising:
a second contact within the second current electrode region, wherein sidewalls of a portion of the second contact located within a second opening in the second current electrode region are completely surrounded by the second current electrode region, and the second contact is electrically coupled to the second current electrode region.
10. The semiconductor device of claim 9 , further comprising:
a third contact within the gate structure, wherein sidewalls of a portion of the third contact located within a third opening in the gate structure are completely surrounded by the gate structure, and wherein the third contact is electrically coupled to the gate structure.
11. The semiconductor device of claim 8 , wherein the first current electrode region is a source region.
12. The semiconductor device of claim 8 , wherein the first current electrode region is a drain region.
13. A semiconductor device comprising:
a gate structure on a substrate;
a first current electrode region on the substrate;
a first contact formed in an opening in the first current electrode region that extends to the substrate, wherein sidewalls of a portion of the first contact located within the first current electrode region are completely surrounded by the first current electrode region, and wherein the first contact is electrically coupled to the first current electrode region;
a second current electrode region; and
a channel region between the first current electrode region and the second current electrode region, wherein the channel region is located in a fin structure, and wherein the gate structure overlies the fin structure.
14. The semiconductor device of claim 13 , wherein the substrate is an insulator.
15. The semiconductor device of claim 13 , wherein the first contact has a cross-sectional shape selected from a group consisting of a rectangular cross-sectional shape, and a tapered cross-sectional shape having a first width at a top of the first contact and a second width at a bottom of the first contact.
16. The semiconductor device of claim 13 , further comprising:
a second contact within the second current electrode region, wherein sidewalls of a portion of the second contact located within an opening in the second current electrode region are completely surrounded by the second current electrode region, and the second contact is electrically coupled to the second current electrode region.
17. The semiconductor device of claim 16 , wherein the first current electrode region is a source region, and the second current electrode region is a drain region.