Semiconductor device and manufacturing method thereof
View Patent ↗One embodiment of the present invention is to achieve high mobility in a device using an oxide semiconductor and provide a highly reliable display device. An oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface is formed and an oxide insulating layer is formed over and in contact with the oxide semiconductor layer. Oxygen is supplied to the oxide semiconductor layer by third heat treatment. A nitride insulating layer containing hydrogen is formed over the oxide insulating layer and fourth heat treatment is performed, so that hydrogen is supplied at least to an interface between the oxide semiconductor layer and the oxide insulating layer.
1. A semiconductor device comprising:
a first oxide semiconductor layer over a substrate having an insulating surface, the first oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface of the first oxide semiconductor layer;
a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer, the second oxide semiconductor layer including a crystal region in which c-axis is aligned in the direction substantially perpendicular to the surface;
a source electrode layer and a drain electrode layer over the first oxide semiconductor layer and the second oxide semiconductor layer;
an oxide insulating layer over and in contact with the second oxide semiconductor layer;
a gate electrode layer over the oxide insulating layer; and
a nitride insulating layer containing hydrogen over the gate electrode layer.
2. A semiconductor device comprising:
a gate electrode layer over a substrate having an insulating surface;
a gate insulating layer over the gate electrode layer;
a first oxide semiconductor layer over the gate insulating layer and in contact with at least part of the gate insulating layer, the first oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface of the first oxide semiconductor layer;
a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer, the second oxide semiconductor layer including a crystal region in which c-axis is aligned in the direction substantially perpendicular to the surface;
a source electrode layer and a drain electrode layer over the first oxide semiconductor layer and the second oxide semiconductor layer;
an oxide insulating layer over and in contact with the second oxide semiconductor layer; and
a nitride insulating layer containing hydrogen over and in contact with the oxide insulating layer.
3. A semiconductor device comprising:
a first oxide semiconductor layer over a substrate having an insulating surface, the first oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface of the first oxide semiconductor layer;
a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer, the second oxide semiconductor layer including a crystal region in which c-axis is aligned in the direction substantially perpendicular to the surface;
an oxide insulating layer over and in contact with the second oxide semiconductor layer; and
a nitride insulating layer containing hydrogen over and in contact with the oxide insulating layer.
4. A semiconductor device comprising:
a first oxide semiconductor layer;
a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface of the second oxide semiconductor layer;
an oxide insulating layer over the second oxide semiconductor layer; and
a nitride insulating layer containing hydrogen over the oxide insulating layer.
5. The semiconductor device according to claim 1 , wherein off-state current density of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is 100 aA/μm or less.
6. The semiconductor device according to claim 1 , wherein off-state resistivity of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is greater than or equal to 1×10 9 Ω·m.
7. The semiconductor device according to claim 1 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor comprising indium and zinc.
8. The semiconductor device according to claim 1 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In—Ga—Zn—O based oxide.
9. The semiconductor device according to claim 2 , wherein off-state current density of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is 100 aA/μm or less.
10. The semiconductor device according to claim 2 , wherein off-state resistivity of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is greater than or equal to 1×10 9 Ω·m.
11. The semiconductor device according to claim 2 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor comprising indium and zinc.
12. The semiconductor device according to claim 2 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In—Ga—Zn—O based oxide.
13. The semiconductor device according to claim 3 , wherein off-state current density of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is 100 aA/μm or less.
14. The semiconductor device according to claim 3 , wherein off-state resistivity of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is greater than or equal to 1×10 9 Ω·m.
15. The semiconductor device according to claim 3 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor comprising indium and zinc.
16. The semiconductor device according to claim 3 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In—Ga—Zn—O based oxide.
17. The semiconductor device according to claim 4 , wherein off-state current density of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is 100 aA/μm or less.
18. The semiconductor device according to claim 4 , wherein off-state resistivity of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is greater than or equal to 1×10 9 Ω·m.
19. The semiconductor device according to claim 4 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor comprising indium and zinc.
20. The semiconductor device according to claim 4 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In—Ga—Zn—O based oxide.
21. The semiconductor device according to claim 4 , wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer.
22. The semiconductor device according to claim 4 , wherein the first oxide semiconductor layer includes a crystal region in which c-axis is aligned in a direction substantially perpendicular to a surface of the first oxide semiconductor layer.
23. The semiconductor device according to claim 1 ,
wherein the first oxide semiconductor layer is in a non-single-crystal state, and
wherein the second oxide semiconductor layer is in a non-single-crystal state.
24. The semiconductor device according to claim 2 ,
wherein the first oxide semiconductor layer is in a non-single-crystal state, and
wherein the second oxide semiconductor layer is in a non-single-crystal state.
25. The semiconductor device according to claim 3 ,
wherein the first oxide semiconductor layer is in a non-single-crystal state, and
wherein the second oxide semiconductor layer is in a non-single-crystal state.
26. The semiconductor device according to claim 4 ,
wherein the first oxide semiconductor layer is in a non-single-crystal state, and
wherein the second oxide semiconductor layer is in a non-single-crystal state.
27. A semiconductor device comprising:
a first oxide semiconductor layer;
a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer including a crystal region in which c-axis is aligned in a direction, wherein an angle between the direction and a surface of the second oxide semiconductor layer is within a range of 80° to 100° ;
an oxide insulating layer over the second oxide semiconductor layer; and
a nitride insulating layer containing hydrogen over the oxide insulating layer,
wherein the second oxide semiconductor layer is in a non-single-crystal state.
28. The semiconductor device according to claim 27 , further comprising:
a gate electrode under the first oxide semiconductor layer.
29. The semiconductor device according to claim 27 , wherein off-state current density of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is 100 aA/μm or less.
30. The semiconductor device according to claim 27 , wherein off-state resistivity of a transistor comprising the first oxide semiconductor layer and the second oxide semiconductor layer is greater than or equal to 1×10 9 Ω·m.
31. The semiconductor device according to claim 27 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor comprising indium and zinc.
32. The semiconductor device according to claim 27 , wherein at least one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises In—Ga—Zn—O based oxide.
33. The semiconductor device according to claim 27 , wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer.
34. The semiconductor device according to claim 27 , wherein the first oxide semiconductor layer includes a crystal region in which c-axis is aligned in a second direction, wherein an angle between the second direction and a surface of the first oxide semiconductor layer is within a range of 80° to 100° .