IP Library › Granted Patent US 8,873,615
Granted Patent B2
US 8,873,615 · App. 13/622,508 · Granted Oct 28, 2014

Method and controller for equalizing a received serial data stream

Inventors: David Chak Wang Hui (Santa Clara, CA); Xiaozhong Wang (Cupertino, CA)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
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Quick Facts
Patent No.
US 8,873,615
App. No.
13/622,508
Filed
Sep 19, 2012
Granted
Oct 28, 2014
Kind
B2
Art Unit
2633
USPC
375/234
Abstract

A controller and methods for adaptively adjusting a dispersion compensation circuit in a receiver of a communication link are disclosed. The controller receives a signal from an error detector coupled to the receiver. The controller includes a logic engine that provides configuration information to the dispersion compensation circuit. The configuration information defines a digital filter in response to at least one tap constraint and at least one coefficient constraint. In an example embodiment, the logic engine generates a measure of residual inter-symbol interference and a measure of a noise enhancement penalty and iteratively provides a set of adjusted coefficient values that when applied in the digital filter will result in an equalized receiver output signal that minimizes a mathematical combination of the measure of the residual inter-symbol interference and the measure of the noise enhancement penalty. Alternatively, for bandwidth limited channels, the controller provides a predetermined set of coefficient values.

Claims (30)

1. A controller for adaptively adjusting a dispersion compensation circuit in a receiver of a communication link, comprising:

a first interface for receiving a signal from an error detector responsive to an output of the dispersion compensation circuit; and

a logic engine coupled to the first interface and arranged to provide configuration information to the dispersion compensation circuit, the configuration information defining a digital filter in response to a tap constraint and a coefficient constraint, the logic engine further arranged to generate a measure of residual inter-symbol interference and a measure of noise enhancement penalty and iteratively generating a set of adjusted coefficient values that when applied in the digital filter will result in an equalized receiver output signal that minimizes a mathematical combination of the measure of the residual inter-symbol interference and the measure of the noise enhancement penalty, wherein the noise enhancement penalty is a function of an original noise prior to the dispersion compensation circuit and a square root of a sum of a set of ratios of the tap weights of non-reference taps divided by the tap weight of a reference tap where the set of ratios is squared.

2. The controller of claim 1 , wherein the tap constraint includes a minimum number of taps in the defined digital filter.

3. The controller of claim 1 , wherein the tap constraint includes a fractional unit interval space between adjacent taps in the defined digital filter.

4. The controller of claim 3 , wherein the tap constraint includes a range of fractional unit interval spaces between adjacent taps in the defined digital filter.

5. The controller of claim 4 , wherein the range of fractional unit interval spaces between adjacent taps is fixed with a value in the range of 0.3 to 0.7.

6. The controller of claim 1 , wherein the tap constraint includes at least two precursor taps in the defined digital filter.

7. The controller of claim 1 , wherein the tap constraint includes a location of a reference tap in the digital filter.

8. The controller of claim 7 , wherein the location of the reference tap in the digital filter is asymmetric with respect to remaining taps.

9. The controller of claim 1 , wherein the tap constraint is responsive to a comparison of a pulse spread of a received signal with a function of the number of taps and a fractional unit interval space between adjacent taps.

10. The controller of claim 9 , wherein the comparison confirms that the result of the function is at least as wide as the pulse spread of the received signal.

11. The controller of claim 1 , wherein the tap constraint includes a tap spread of at least 3 unit intervals.

12. The controller of claim 1 , wherein the coefficient constraint includes ensuring that a sign associated with a coefficient value for adjacent taps to a reference tap is positive.

13. The controller of claim 1 , wherein the coefficient constraint includes a range for a sum of coefficient values.

14. The controller of claim 13 , wherein the range for the sum of coefficient values is from 0.8 to 1.2.

15. A method for adaptively equalizing a received serial data stream processed by a dispersion compensation circuit, the method comprising:

receiving a signal from a detector responsive to an output of the dispersion compensation circuit;

using a logic engine responsive to the signal from the error detector, a tap constraint, and a coefficient constraint, to generate and provide configuration information to the dispersion compensation circuit;

using the logic engine to generate a measure of residue inter-symbol interference in a receive signal adjusted with the dispersion compensation circuit;

using the logic engine to generate a measure of noise enhancement penalty in the receive signal adjusted with the dispersion compensation circuit, wherein the noise enhancement penalty is a function of an original noise in a received serial data stream before adaptive equalization by the dispersion compensation circuit and a square root of a sum of a set of ratios of the tap weights of non-reference taps divided by the tap weight of a reference tap where the set of ratios is squared; and

iteratively generating a set of adjusted coefficient values that when applied in the dispersion compensation circuit will result in an equalized receiver output signal that minimizes a mathematical combination of the measure of the residue inter-symbol interference and the measure of the noise enhancement penalty.

16. The method of claim 15 , wherein the tap constraint includes a fractional unit interval space between adjacent taps in a digital filter.

17. The method of claim 15 , further comprising:

forwarding a tap delay adjustment to controllably manipulate a fractional unit interval space between adjacent taps in a digital filter.

18. The method of claim 17 , wherein the tap delay adjustment is applied to taps adjacent to a reference tap.

19. A method for equalizing a received serial data stream processed by a dispersion compensation circuit, the method comprising:

determining that a received signal is degraded due to a bandwidth limited communication channel; and

applying a set of coefficient values to the dispersion compensation circuit, the coefficient values generated as a function of a coefficient value for the adjacent taps to a reference tap, wherein a coefficient value associated with the reference tap is one, wherein a sign associated with both adjacent taps is positive.

20. The method of claim 19 , wherein the coefficient value for the adjacent taps to the reference tap is in a range of 0.3 to 0.5 and the coefficient value for taps further removed from the reference tap are determined from the product of −½ and the coefficient value for the adjacent taps.

Assignments (10)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2012
From: HUI, DAVID CHAK WANG; WANG, XIAOZHONG
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 028987/0322 →
Continuity (1)
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