IP Library Patent Application 13624775
Patent Application
App. No. 13/624,775

LESS EXPENSIVE HIGH POWER PLASTIC SURFACE MOUNT PACKAGE

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Quick Facts
Patent No.
US None
App. No.
13/624,775
Filed
Sep 21, 2012
Art Unit
2814
USPC
257/692
Abstract

A high power surface mount package including a thick bond line of solder interposed between the die and a heatsink, and between the die and a lead frame, wherein the lead frame has the same coefficient of thermal expansion as the heatsink. The heatsink and the lead frame preferably comprise the same material. The package can be assembled using standard automated equipment, and does not require a weight or clip to force the parts close together, which force typically reduces the solder bond line thickness. Advantageously, the thermal stresses on each side of the die are effectively balanced, allowing for a large surface area die to be packaged with conventional and less expensive materials. One type of die that benefits from the present invention can include a transient voltage suppressor, but could include other dies generating a significant amount of heat, such as those in excess of 0.200 inches square.

Claims (31)

1 . A method of forming a semiconductor package, comprising the steps of:

disposing a first solder paste having a first coefficient of thermal expansion on a lead;

disposing a semiconductor die on the first solder paste;

disposing a second solder paste on the semiconductor die;

disposing a heatsink having a second coefficient of thermal expansion on the second solder paste; and

heating the recited elements above to melt the first and second solder paste.

2 . The method as specified in claim 1 wherein no force is applied to the recited elements during the heating step.

3 . The method as specified in claim 1 wherein the lead and the heatsink are comprised of the same material.

4 . The method as specified in claim 1 wherein the first coefficient of thermal expansion and the second coefficient of thermal expansion are the same.

5 . The method as specified in claim 1 wherein the first solder material has a thickness of at least 0.005 inches.

6 . The method as specified in claim 4 wherein the second solder material has a thickness of at least 0.005 inches.

7 . The method as specified in claim 1 wherein the first and second solder materials have coefficients of thermal expansion that are substantially the same.

8 . The method as specified in claim 6 wherein the first and second solder materials are comprised of the same material.

9 . The method as specified in claim 6 wherein at least the first solder material or the second solder material is comprised of lead and tin.

10 . The method as specified in claim 8 wherein both the first solder material and the second solder material are comprised of 88Pb10Sn2Ag solder.

11 . A method of forming a semiconductor package, comprising the steps of:

disposing a first solder paste having a first coefficient of thermal expansion on a lead;

disposing a semiconductor die on the first solder paste;

disposing a second solder paste on the semiconductor die;

disposing a heatsink having a second coefficient of thermal expansion on the second solder paste; and

heating the recited elements above to melt the first and second solder paste;

wherein the first solder paste has a first thickness and is disposed continuously between the semiconductor die and the lead;

wherein the first solder paste has a thickness within the range of 0.005 to 0.01 inches;

wherein the second solder paste has a thickness within the range of 0.005 to 0.01 inches; and

wherein the first coefficient of thermal expansion and the second coefficient of thermal expansion are substantially the same.

12 . The method as specified in claim 11 wherein no force is applied to the recited elements during the heating step.

13 . The method as specified in claim 11 wherein the lead and the heatsink are comprised of the same material.

14 . The method as specified in claim 11 wherein the first and second solder pastes are comprised of the same material.

15 . The method as specified in claim 11 wherein at least the first solder paste or the second solder paste is comprised of lead and tin.

16 . The method as specified in claim 11 wherein both the first solder paste and the second solder paste are comprised of 88Pb10Sn2Ag solder.

17 . The method as specified in claim 11 wherein the first and second solder pastes have coefficients of thermal expansion that are substantially the same.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jan 19, 2016
From: BANK OF AMERICA, N.A.
To: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP, A DELAWARE CORPORATION; MICROSEMI SOC CORP., A CALIFORNIA CORPORATION; MICROSEMI SEMICONDUCTOR (U.S.) INC., A DELAWARE CORPORATION; MICROSEMI FREQUENCY AND TIME CORPORATION, A DELAWARE CORPORATION; MICROSEMI COMMUNICATIONS, INC. (F/K/A VITESSE SEMICONDUCTOR CORPORATION), A DELAWARE CORPORATION; MICROSEMI CORP.-MEMORY AND STORAGE SOLUTIONS (F/K/A WHITE ELECTRONIC DESIGNS CORPORATION), AN INDIANA CORPORATION
Reel/Frame 037558/0711 →
SECURITY AGREEMENT Recorded Apr 22, 2015
From: MICROSEMI CORPORATION; MICROSEMI CORP.-ANALOG MIXED SIGNAL GROUP; MICROSEMI SEMICONDUCTOR (U.S.) INC.; MICROSEMI SOC CORP.; MICROSEMI FREQUENCY AND TIME CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 035477/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2014
From: AUTRY, TRACY
To: MICROSEMI CORPORATION
Reel/Frame 033771/0610 →