IP Library Granted Patent US 8,966,183
Granted Patent B2
US 8,966,183 · App. 13/645,050 · Granted Feb 24, 2015

Opportunistic cache replacement policy

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Quick Facts
Patent No.
US 8,966,183
App. No.
13/645,050
Granted
Feb 24, 2015
Kind
B2
Abstract

A cache management system employs a replacement policy in a manner that manages concurrent accesses to cache. The cache management system comprises a cache, a replacement policy storage for storing replacement statuses of cache lines of the cache, and an update module. The update module, comprising access filtering and a concurrent update handling, determines how updates to the replacement policy storage are handled. In a multi-threaded compute environment, a concurrent access to shared cache causes a selective update to the replacement policy storage.

Claims (40)

1. A processing system, comprising:

one or more processors for issuing cache requests; and

a cache management system, comprising:

a cache comprising a plurality of cache lines;

a replacement policy storage to store a replacement status for each cache line;

an update module to selectively update the replacement statuses of cache lines in the replacement policy storage, the update module comprising:

a concurrent update unit to perform a single update request for the replacement policy storage from a plurality of concurrent update requests, the concurrent update requests resulting from concurrent cache accesses; and

an access filter unit to filter update requests to the replacement policy storage based on a type of cache access and to provide the concurrent update requests, the access filter unit to:

inhibit update requests to the replacement policy storage for store accesses to the cache; and

permit update requests to the replacement policy storage for load accesses to the cache.

2. The processing system of claim 1 , wherein a concurrent update unit is to discard unselected update requests of the plurality of concurrent update requests.

3. The processing system of claim 1 , wherein the replacement policy storage comprises a single port memory.

4. The processing system of claim 1 , wherein the concurrent update unit is to select the single update request to be performed from a plurality of concurrent update requests based on a round robin scheme.

5. The processing system of claim 1 , wherein the concurrent update unit is to select the single update request to be performed from a plurality of concurrent update requests based on a first-in, first-out (FIFO) scheme.

6. The processing system of claim 1 , wherein the replacement policy storage is a component of a cache tag memory.

7. The processing system of claim 1 , wherein the one or more processors share the cache.

8. The processing system of claim 7 , wherein the one or more processors and the cache management system are implemented on an integrated circuit.

9. A method of cache management, comprising:

generating update requests for a replacement policy storage responsive to accesses to a cache, the replacement policy storage storing a replacement status for each cache line of the cache; and

selectively updating the replacement policy storage responsive to the update requests, wherein the selectively updating includes:

selecting and performing a single update request to the replacement policy storage for a concurrent update request using a selection process, the concurrent updates resulting from concurrent cache accesses filtering the update requests based on type of the corresponding cache accesses, said concurrent update request comprising a plurality of filtered concurrent update requests, wherein filtering the update requests comprises:

inhibiting update requests to the replacement policy storage for store accesses to the cache; and

permitting update requests to the replacement policy storage for load accesses to the cache.

10. The method of claim 9 , further comprising:

selecting a cache line of the cache for replacement using the replacement policy storage and a pseudo-least recently used (PLRU) scheme.

11. The method of claim 9 , wherein the concurrent cache accesses are generated by a plurality of threads executing concurrently at a plurality of processor cores sharing the cache.

12. The method of claim 9 , further comprising discarding unselected update requests of a plurality of concurrent update requests.

13. The method of claim 9 , further comprising selecting the single update request to be performed from a plurality of concurrent update requests based on a round robin scheme.

14. The method of claim 9 , further comprising selecting the single update request to be performed from a plurality of concurrent update requests based on a first-in, first-out (FIFO) scheme.

15. In a processing system comprising a cache and a replacement policy storage storing a replacement status for each cache line of the cache, a method comprising:

concurrently generating a first plurality of update requests for the replacement policy storage responsive to a plurality of concurrent cache accesses;

filtering the first plurality of update requests based on a type of cache access for each update request to generate a second plurality of update requests;

selecting and performing a single update request of the second plurality of update requests to update the replacement policy storage; and

not performing the remaining update requests of the second plurality of update requests.

16. The method of claim 15 , wherein filtering the first plurality of update requests comprises:

not performing update requests for store accesses to the cache.

17. The method of claim 15 , further comprising:

selecting a cache line for removal from the cache based on the replacement statuses of the cache lines stored at the replacement policy storage.

18. The method of claim 15 , wherein filtering the first plurality of update requests comprises:

not performing update requests for load accesses to the cache.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
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