Phase locked loop circuitry having switched resistor loop filter circuitry, and methods of operating same
Phase-locked loop circuitry to generate an output signal, the phase-locked loop circuitry comprising oscillator circuitry, switched resistor loop filter, coupled to the input of the oscillator circuitry (which, in one embodiment, includes a voltage-controlled oscillator), including a switched resistor network including at least one resistor and at least one capacitor, wherein an effective resistance of the switched resistor network is responsive to and increases as a function of one or more pulsing properties of a control signal (wherein pulse width and frequency (or period) are pulsing properties of the control signal), phase detector circuitry, having an output which is coupled to the switched resistor loop filter, to generate the control signal (which may be periodic or non-periodic). The phase-locked loop circuitry may also include frequency detection circuitry to provide a lock condition of the phase-locked loop circuitry.
1. A phase-locked loop circuitry comprising:
oscillator circuitry having an input and an output;
switched resistor loop filter, having an output which is coupled to the input of the oscillator circuitry, wherein the switched resistor loop filter includes a switched resistor network including a plurality of resistors, a plurality of capacitors and at least one switch, wherein an effective resistance of the switched resistor network is responsive to and increases as a function of one or more pulsing properties of a control signal;
phase detector circuitry, having an output which is coupled to the switched resistor loop filter, to generate the control signal;
divider circuitry to couple the output of the oscillator circuitry to an input of the phase detector circuitry; and
frequency detection circuitry, coupled to the output of the divider circuitry, to provide a lock condition of the phase-locked loop circuitry, wherein the frequency detection circuitry includes:
(i) circuitry to generate a signal which is representative of the frequency of the output signal of the phase-locked loop circuitry, and
(ii) comparison circuitry to compare the signal which is representative of the frequency of the output signal of the phase-locked loop circuitry to a reference input to the phase-locked loop circuitry.
2. The phase-locked loop circuitry of claim 1 wherein one of the pulsing properties of the control signal is a pulse on-time and wherein the pulse on-time of the control signal is shorter than an RC time constant of the switched resistor network.
3. The phase-locked loop circuitry of claim 1 wherein the effective resistance of the switched resistor network is determined by an average pulse width and average frequency of the control signal.
4. The phase-locked loop circuitry of claim 1 wherein the control signal is periodic.
5. The phase-locked loop circuitry of claim 1 wherein the circuitry of the frequency detection circuitry includes a counter to generate the signal which is representative of the frequency of the output signal of the phase-locked loop circuitry.
6. The phase-locked loop circuitry of claim 1 wherein the control signal is non-periodic.
7. The phase-locked loop circuitry of claim 1 wherein the effective resistance of the switched resistor network is determined by an average pulse width and average frequency of the control signal.
8. The phase-locked loop circuitry of claim 1 wherein the divider circuitry is in a feedback path to couple the output of the oscillator circuitry to an input of the phase detector circuitry.
9. The phase-locked loop circuitry of claim 1 wherein the oscillator circuitry includes a voltage-controlled oscillator.
10. The phase-locked loop circuitry of claim 1 wherein the divider circuitry includes a division factor so that the phase-locked loop circuitry, in operation, provides an integer-N multiple of the reference frequency, where N is greater than 1.
11. The phase-locked loop circuitry of claim 1 wherein the divider circuitry includes a division factor so that the phase-locked loop circuitry, in operation, provides a fractional-N multiple of the reference frequency, where the integer portion, N, is greater than 0 and the fractional component is within the range of 0 to 1.
12. The phase-locked loop circuitry of claim 1 wherein the oscillator circuitry, switched resistor loop filter, phase detector circuitry and divider circuitry are portions of a monolithic integrated circuit device.
13. A phase-locked loop circuitry comprising:
oscillator circuitry having an input and an output;
switched resistor loop filter, having an output which is coupled to the input of the oscillator circuitry, wherein the switched resistor loop filter includes a switched resistor network including a plurality of resistors, a plurality of capacitors and at least one switch, wherein an effective resistance of the switched resistor network is responsive to and increases as a function of one or more pulsing properties of a control signal;
phase detector circuitry, having an output which is coupled to the switched resistor loop filter, to generate the control signal;
divider circuitry to couple the output of the oscillator circuitry to an input of the phase detector circuitry; and
frequency detection circuitry, coupled to the output of the divider circuitry, to provide a lock condition of the phase-locked loop circuitry, wherein the frequency detection circuitry includes:
(i) circuitry to generate a signal which is representative of the frequency of the output signal of the phase-locked loop circuitry,
(ii) comparison circuitry to compare the signal which is representative of the frequency of the output signal of the phase-locked loop circuitry to a reference input to the phase-locked loop circuitry, and
(iii) a switched capacitor network including at least one capacitor.
14. The phase-locked loop circuitry of claim 13 wherein one of the pulsing properties of the control signal is a pulse on-time and wherein the pulse on-time of the control signal is shorter than an RC time constant of the switched resistor network.
15. The phase-locked loop circuitry of claim 13 wherein the effective resistance of the switched resistor network is determined by an average pulse width and average frequency of the control signal.
16. The phase-locked loop circuitry of claim 13 wherein the control signal is periodic or non-periodic.
17. The phase-locked loop circuitry of claim 13 wherein the circuitry of the frequency detection circuitry includes a counter to generate the signal which is representative of the frequency of the output signal of the phase-locked loop circuitry.
18. The phase-locked loop circuitry of claim 13 wherein the effective resistance of the switched resistor network is determined by an average pulse width and average frequency of the control signal.
19. The phase-locked loop circuitry of claim 13 wherein the divider circuitry is in a feedback path to couple the output of the oscillator circuitry to an input of the phase detector circuitry.
20. The phase-locked loop circuitry of claim 13 wherein the oscillator circuitry includes a voltage-controlled oscillator.