Solid-state imaging device and camera
A solid-state imaging device including is provided. The solid-state imaging device includes: pixels arrayed; a photoelectric conversion element in each of the pixels; a read transistor for reading electric charges photoelectrically-converted in the photoelectric conversion elements to a floating diffusion portion; a shallow trench element isolation region bordering the floating diffusion portion; and an impurity diffusion isolation region for other element isolation regions than the shallow trench element isolation region.
1. A solid-state imaging device comprising:
a pixel unit including a plurality of pixels on a substrate, wherein
each of the pixels includes a photoelectric conversion element and a transfer transistor, the transfer transistor being configured to transfer charges generated in the photoelectric conversion element to a floating diffusion portion,
a diffusion isolation region is formed between the pixels,
a trench isolation structure contacts the floating diffusion portion on a first side of the trench isolation structure and contacts the diffusion isolation region on a second side of the trench isolation structure opposite the first side, and
the trench isolation structure continuously extends to a portion beneath and covered by a gate of the transfer transistor from a portion bordering the floating diffusion portion and is not in contact with the photoelectric conversion portion.
2. The solid-state imaging device according to claim 1 , wherein the diffusion isolation region is different shape structure from the trench isolation region.
3. The solid-state imaging device according to claim 1 , wherein the trench isolation structure is formed by a shallow trench structure.
4. The solid-state imaging device according to claim 1 , wherein the diffusion isolation region is interposed between an end of an extended portion of the trench isolation structure under a read gate electrode and the photoelectric conversion element.
5. The solid-state imaging device according to claim 1 , wherein a planarized insulating film having a film thickness equal to that of a gate-insulated film is formed on the trench isolation structure and the diffusion isolation region.
6. The solid-state imaging device according to claim 1 , wherein an insulating layer thicker than the gate-insulated film is formed on the diffusion isolation region.
7. The solid-state imaging device according to claim 1 , further comprising a reset transistor in the pixel, wherein a source region of the reset transistor is the same as the floating diffusion portion.
8. The solid-state imaging device according to claim 1 , wherein a plurality of the arranged pixels share pixel transistors other than the transfer transistor.
9. The solid-state imaging device according to claim 8 , wherein the pixel transistors include at least a reset transistor.
10. The solid-state imaging device according to claim 1 , wherein the diffusion isolation region is formed by an impurity diffusion isolation region.
11. The solid-state imaging device according to claim 3 , wherein the shallow trench structure is filled with an insulating film.
12. The solid-state imaging device according to claim 1 , wherein a conductivity of the substrate is opposite to a conductivity of the diffusion isolation region.
13. The solid-state imaging device according to claim 1 , wherein a semiconductor well region is formed on the substrate, the photoelectric conversion element and the floating diffusion portion being formed in the semiconductor well region, the semiconductor well region being of a third conductivity.
14. The solid-state imaging device according to claim 13 , wherein a portion of the semiconductor well region is formed between the diffusion isolation region and the substrate.
15. The solid-state imaging device according to claim 13 , wherein a conductivity of the substrate is opposite to the third conductivity.
16. The solid-state imaging device according to claim 1 , wherein a gate electrode of the transfer transistor includes a first portion and a second portion, the first portion of the gate electrode being of a fourth conductivity and the second portion of the gate electrode being of a fifth conductivity.
17. The solid-state imaging device according to claim 16 , wherein the fourth conductivity is opposite to the fifth conductivity.
18. The solid-state imaging device according to claim 16 , wherein the first portion of the gate electrode is formed of a first impurity doped polysilicon and the second portion of the gate electrode is formed of a second impurity doped polysilicon.
19. The solid-state imaging device according to claim 16 , wherein the first portion of the gate electrode is above the diffusion isolation region in a depth direction of the substrate, and the second portion of the gate electrode is above a transfer channel of the transfer transistor.
20. The solid-state imaging device according to claim 19 , wherein the first portion of the gate electrode is n-type doped and the second portion of the gate electrode is p-type doped.
21. The solid-state imaging device according to claim 16 , wherein the second portion of the gate electrode is formed of non-doped polysilicon.
22. The solid-state imaging device according to claim 1 , further comprising a reset transistor in the pixel, wherein the trench isolation structure contacts the reset transistor.