Patterning methods and methods of forming electrically conductive lines
View Patent ↗Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.
1. A method of forming a pattern, comprising:
forming photoresist features over a substrate; at least one of the photoresist features having a narrowed region; the narrowed region comprising concave segments on opposing sides of the photoresist feature; the concave segments comprising outer surfaces; an opening extending from the outer surface of one of the concave segments to the outer surface of the other of the concave segments, and extending entirely through the narrowed region;
trimming the photoresist features to reduce widths of the photoresist features, the trimming punching through the narrowed region to form a gap extending through said at least one of the photoresist features;
forming spacers along sidewalls of the photoresist features; the spacers on opposing sides of said at least one of the photoresist features merging within the gap; and
removing the photoresist features to leave a pattern comprising the spacers.
2. The method of claim 1 wherein the spacers comprise electrically insulative material.
3. The method of claim 1 wherein the spacers comprise electrically conductive material.
4. The method of claim 1 wherein the photoresist features are formed utilizing a photolithographic process having a minimum lithographic dimension; and wherein the gap has a sublithographic dimension from photoresist on one side of the gap to photoresist on an opposing side of the gap.
5. A method of forming electrically conductive lines, comprising:
forming photoresist lines over a substrate; at least one of the photoresist lines having a narrowed region; the narrowed region comprising concave segments on opposing sides of the photoresist line; the concave segments comprising outer surfaces; an opening extending from the outer surface of one of the concave segments to the outer surface of the other of the concave segments, and extending entirely through the narrowed region;
trimming the photoresist lines to reduce widths of the photoresist lines, the trimming punching through the narrowed region to form a gap extending through said at least one of the photoresist lines;
forming spacers along sidewalls of the photoresist lines; the spacers on opposing sides of said at least one of the photoresist lines merging within the gap to form at least one merged region of the spacers;
removing the photoresist lines to leave a pattern comprising the spacers;
extending the pattern into the substrate with one or more etches to form a plurality of recesses within the substrate; and
forming electrically conductive material within the recesses to create electrically conductive lines; the at least one merged region translating into a dielectric region that separates a pair of the electrically conductive lines from one another.
6. The method of claim 5 wherein the forming of the spacers comprises:
forming spacer material over and between the photoresist lines; and
anisotropically etching the spacer material.
7. The method of claim 5 wherein the spacers comprise silicon dioxide.
8. The method of claim 5 wherein the spacers comprise silicon nitride.
9. The method of claim 5 wherein the creating of the electrically conductive lines comprises:
overfilling the recesses with the electrically conductive material; and
removing excess electrically conductive material to leave the lines within the recesses.
10. The method of claim 5 wherein the substrate comprises a semiconductor base supporting a stack comprising, in ascending order, a dielectric material, carbon, and an antireflective material; and wherein the extending of the pattern into the substrate forms the recesses within the dielectric material.