IP Library Granted Patent US 9,331,230
Granted Patent B2
US 9,331,230 · App. 13/663,519 · Granted May 3, 2016

LED die dispersal in displays and light panels with preserving neighboring relationship

Inventors: Chan-Long Shieh (Paradise Valley, AZ); Gang Yu (Santa Barbara, CA)
Assignee: CBRITE INC.
H01L31/18H01L21/67144H01L25/042H01L33/0095H01L25/0753H01L2224/83H01L2224/95H01L2924/0002Y10T156/171
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Quick Facts
Patent No.
US 9,331,230
App. No.
13/663,519
Granted
May 3, 2016
Kind
B2
Abstract

A method of dispersing semiconductor chips from a wafer of semiconductor chips onto a substrate while preserving the neighboring relationship of each chip to each adjacent chip is disclosed. The method includes dispersing the wafer into sequential columns of semiconductor chips with a first pitch between columns while preserving the neighboring relationship and sequentially dispersing the columns of semiconductor chips into rows of individual chips with a second pitch between rows onto a substrate while preserving the neighboring relationship.

Claims (21)

1. A method of dispersing semiconductor chips from a wafer of LED semiconductor chips each chip with a d1×d2 area, including m columns and n rows of semiconductor chips, onto a substrate while preserving the neighboring relationship of each chip to each adjacent chip, the method comprising the steps of:

dispersing the wafer into sequential columns of semiconductor chips, including m sub-steps, with a first pitch L2 between columns while preserving the neighboring relationship;

sequentially dispersing the columns of semiconductor chips into rows of individual chips, including n sub-steps, with a second pitch L1 between rows onto a substrate while preserving the neighboring relationship;

the steps of dispersing the wafer into sequential columns and sequentially dispersing the columns of semiconductor chips into rows providing a dilution factor in a range of 9 to 9000.

2. A method as claimed in claim 1 wherein the wafer includes m columns and n rows of GaN LED semiconductor chips each chip having an area at least 10 μm by 10 μm, and the dilution factor being approximately 9000.

3. A method as claimed in claim 1 wherein the semiconductor die chips dispersed include one of light emitting elements of a flat panel light source, a backlight unit in an active matrix LCD display, a passive matrix light emitting diode array, and a component of a full-color, active matrix display.

4. A method as claimed in claim 1 wherein the semiconductor die chips dispersed include a sensing function and are being used as sensing elements of one of a photovoltaic solar cell panel, a light detector array, radiation detector array, a biosensor sensor array, or other type of sensor arrays.

5. A method of dispersing semiconductor chips from a wafer of semiconductor chips onto a substrate while preserving the neighboring relationship of each chip to each adjacent chip, the method comprising the steps of:

providing a wafer cut into individual chips in m columns and n rows, and releasably adhering the wafer on a first carrier including using one of a UV releasable adhesive, a UV-releasable tape, a thermal transfer layer, or a laser induced sublimation transfer layer;

providing an intermediate carrier and placing a layer of releasable adhesive thereon;

dispersing the wafer from the first carrier into sequential columns of semiconductor chips with a first pitch between columns to the intermediate carrier while preserving the neighboring relationship, releasing each sequential column from the first carrier including illuminating each sequential column one column at a time with UV radiation, and adhering each released column to the intermediate carrier with the layer of releasable adhesive as each column is dispersed from the first carrier to the intermediate carrier;

providing a substrate; and

sequentially dispersing the columns of semiconductor chips from the intermediate carrier into rows of individual chips with a second pitch between rows to the substrate while preserving the neighboring relationship, and releasing each sequential row of individual chips from the intermediate carrier as each row of individual chips is dispersed from the intermediate carrier to the substrate.

6. A method as claimed in claim 5 wherein the step of placing the layer of releasable adhesive on the intermediate carrier includes applying a UV releasable adhesive.

7. A method as claimed in claim 6 wherein the step of releasing each sequential row of individual chips from the intermediate carrier includes illuminating each sequential row of individual chips one row at a time with UV radiation.

8. A method as claimed in claim 5 wherein the steps of dispersing the wafer from the first carrier into sequential columns and sequentially dispersing the columns into rows of individual chips includes dispersing the wafer from the first carrier to the substrate with an upper surface of each chip in the wafer oriented as an upper surface of each chip on the substrate.

9. A method as claimed in claim 5 wherein the step of dispersing the wafer into sequential columns includes m sub-steps and the step of sequentially dispersing the columns of semiconductor chips into rows includes n sub-steps.

10. A method as claimed in claim 5 wherein the wafer includes m columns and n rows of LED semiconductor chips each chip with a d1×d2 area, the first pitch being L2, and the second pitch being L1, the steps of dispersing the wafer into sequential columns and sequentially dispersing the columns of semiconductor chips into rows providing a dilution factor in a range of 9 to 9000.

11. A method as claimed in claim 10 wherein the step of providing the substrate includes providing a substrate with contact pads thereon, each contact pad having an area larger than the area of each LED semiconductor chip, and the contact pads positioned in m columns and n rows with the first pitch L2 and the second pitch L1 therebetween, and the step of sequentially dispersing columns of semiconductor chips from the intermediate carrier into rows of individual chips to the substrate includes positioning the rows of individual chips on the rows of contact pads.

12. A method as claimed in claim 5 wherein the semiconductor die chips dispersed are light emitting elements of one of a flat panel light source, a backlight unit in an active matrix LCD display, a passive matrix light emitting diode array, and a full-color active matrix display.

13. A method as claimed in claim 5 wherein the semiconductor die chips dispersed are of a sensing function and are being used as sensing elements of one of a light detector array, radiation detector array, a biosensor sensor array, or other type of sensor arrays.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED ON REEL 048069 FRAME 0427. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE BY SECURED PARTY. Recorded Apr 13, 2020
From: FULL STRENGTH GROUP LIMITED
To: ABC SERVICES GROUP, INC., SOLELY IN ITS CAPACITY AS ASSIGNEE FOR THE BENEFIT OF CREDITORS OF CBRITE INC.; CBRITE INC.
Reel/Frame 052384/0832 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED AT REEL: 045653 FRAME: 0823. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 13, 2020
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 052377/0853 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED AT REEL: 045653 FRAME: 0983. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 13, 2020
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 052377/0913 →
CORRECTIVE ASSIGNMENT TO CORRECT THE LIST OF PROPERTIES SO THAT IT DOES NOT INCLUDE US PATENT NO. 8233212 PREVIOUSLY RECORDED ON REEL 049879 FRAME 0645. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Apr 13, 2020
From: ABC SERVICES GROUP, INC.
To: FANTASY SHINE LIMITED
Reel/Frame 052384/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2019
From: ABC SERVICES GROUP, INC.
To: FANTASY SHINE LIMITED
Reel/Frame 049879/0645 →
RELEASE OF SECURITY INTEREST Recorded Jan 14, 2019
From: FULL STRENGTH GROUP LIMITED
To: ABC SERVICES GROUP, INC., SOLELY IN ITS CAPACITY AS ASSIGNEE FOR THE BENEFIT OF CREDITORS OF CBRITE INC.; CBRITE INC.
Reel/Frame 048069/0427 →
SECURITY INTEREST Recorded Mar 20, 2018
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 045653/0823 →
SECURITY INTEREST Recorded Mar 20, 2018
From: CBRITE INC.
To: FULL STRENGTH GROUP LIMITED
Reel/Frame 045653/0983 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2016
From: SHIEH, CHAN-LONG; YU, GANG
To: CBRITE INC.
Reel/Frame 037545/0112 →
Continuity (1)
Related Publication 20140120640A1 · May 1, 2014