IP Library › Granted Patent US 8,710,550
Granted Patent B2
US 8,710,550 · App. 13/665,194 · Granted Apr 29, 2014

Semiconductor device with hetero-junction bodies

Inventors: Takashi Ishigaki (Tokyo, JP); Ryuta Tsuchiya (Tokyo, JP); Kazuhiro Mochizuki (Tokyo, JP); Akihisa Terano (Tokyo, JP)
Assignee: Hitachi, Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,710,550
App. No.
13/665,194
Granted
Apr 29, 2014
Kind
B2
Abstract

A semiconductor device includes a nitride semiconductor stack having at least two hetero junction bodies where a first nitride semiconductor layer and a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer are disposed, and includes a drain electrode and, a source electrode disposed to the nitride semiconductor stack, and gate electrodes at a position put between the drain electrode and the source electrode and disposed so as to oppose them respectively in which the drain electrode and the source electrode are disposed over the surface or on the lateral side of the nitride semiconductor stack, and the gate electrode has a first gate electrode disposed in the direction of the depth of the nitride semiconductor stack and a second gate electrode disposed in the direction of the depth of the nitride semiconductor at a depth different from the first gate electrode.

Claims (26)

1. A semiconductor device comprising:

a nitride semiconductor stack having at least one set of two hetero-junction bodies where a first nitride semiconductor layer and a second nitride semiconductor layer having a second band gap wider than a first band gap of the first nitride semiconductor layer are stacked;

a drain electrode, a source electrode, and gate electrodes positioned between the drain electrode and the source electrode and disposed so as to oppose them, respectively,

wherein the drain electrode and the source electrode are disposed along opposite sides of the nitride semiconductor stack,

wherein the drain electrode and the source electrode are electrically connected to hetero-interfaces of the hetero-junction bodies, and

wherein the gate electrodes include, a first gate electrode extending to a first depth in the nitride semiconductor stack and a second gate electrode extending to a second depth in the nitride semiconductor stack different from the first depth.

2. The semiconductor device according to claim 1 , wherein

the first gate electrode is disposed in an inside of the nitride semiconductor stack and one set or less of the hetero-junction bodies is disposed below the first gate electrode.

3. The semiconductor device according to claim 1 , wherein

the first gate electrode passes through at least one set of the hetero-junction bodies.

4. The semiconductor device according to claim 1 , wherein

the second gate electrode is disposed in an inside and over a surface of the nitride semiconductor stack, and two sets or more of the hetero-junction bodies are disposed below the second gate electrode.

5. The semiconductor device according to claim 1 , wherein

the first gate electrode and the second gate electrode comprise an electroconductive material disposed, by way of a gate insulative film, over a surface of the nitride semiconductor stack and in at least one trench formed in an inside of the nitride semiconductor stack.

6. The semiconductor device according to claim 1 , wherein

each of the first gate electrode and the second gate electrode have longitudinal ends disposed so as to extend in the inside and over a surface of the nitride semiconductor stack to an insulated device isolation region disposed along lateral sides of the nitride semiconductor stack in an inside and over the surface of the nitride semiconductor stack.

7. The semiconductor device according to claim 6 , wherein

the first gate electrode and the second electrode are disposed in the inside of the nitride semiconductor stack at a predetermined distance and integrated and connected electrically to each other over the surface of the nitride semiconductor stack.

8. The semiconductor device according to claim 6 , wherein

the first gate electrode and the second gate electrode are integrated and connected electrically to each other in the inside and over the surface of the nitride semiconductor stack.

9. The semiconductor device according to claim 1 , wherein

a set of the hetero-junction. bodies comprises GaN and Al x Ga 1-x N (0<x≦1).

10. The semiconductor device according to claim 1 , wherein

a set of the hetero-junction bodies comprises GaN and In y Al 1-y N (0<y≦1).

11. The semiconductor device according to claim 2 , wherein

the second gate electrode is disposed in the inside and over a surface of the nitride semiconductor stack, and two sets or more of the hetero-junction bodies are disposed below the second gate electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2012
From: ISHIGAKI, TAKASHI; TSUCHIYA, RYUTA; MOCHIZUKI, KAZUHIRO; TERANO, AKIHISA
To: HITACHI, LTD.
Reel/Frame 029492/0044 →
Priority Claims (1)
JP 2011-238406 · Oct 31, 2011 · national
Continuity (1)
Related Publication 20130105812A1 · May 2, 2013