IP Library Granted Patent US 8,599,612
Granted Patent B2
US 8,599,612 · App. 13/693,965 · Granted Dec 3, 2013

Method of operating integrated circuit embedded with non-volatile programmable memory having variable coupling related application data

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Quick Facts
Patent No.
US 8,599,612
App. No.
13/693,965
Granted
Dec 3, 2013
Kind
B2
Abstract

A programmable non-volatile device is operated with a floating gate that functions as a FET gate that overlaps a portion of a source/drain region and allows for variable coupling through geometry and/or biasing conditions. This allows a programming voltage for the device to be imparted to the floating gate through variable capacitive coupling, thus changing the state of the device. Multi-state embodiments are also possible. The invention can be used in environments such as data encryption, reference trimming, manufacturing ID, security ID, and many other applications.

Claims (20)

1. A method of operating a non-volatile programmable (NVP) device situated on a substrate comprising:

programming an NPV device including a floating gate, the floating gate comprised of a layer and material that is shared by gates of at least some other non-NVP devices on said substrate,

to a first state with channel hot electrons that alter a voltage threshold of the floating gate,

wherein said channel hot electrons are provided by one of a variable number of drain regions of the NPV device being capacitively coupled to said floating gate based on a variable program voltage;

reading the first state in the NVP device using a bias current to detect said voltage threshold; and

erasing the NVP device with band-band tunneling hot hole injection.

2. A method of operating a programmable non-volatile device comprising: providing a floating gate;

wherein said floating gate is comprised of a material that is also used as a gate for a transistor device also situated on the substrate and associated with at least one of a logic gate or a volatile memory;

providing a source region; and

providing a drain region including at least a first drain region and a second separate drain region; and

capacitively coupling a variable portion of said gate to said drain based on selectively coupling either or both of said first drain region and said second separate drain region;

providing a programming voltage to said drain region, wherein a substantial portion of said programming voltage is also imparted to said floating gate through said capacitive coupling and in an amount corresponding to said selective coupling.

3. A method of operating a multi-level programmable non-volatile device comprising:

providing a floating gate;

wherein said floating gate is comprised of a material that is also used as a gate for a transistor device also situated on the substrate and associated with at least one of a logic gate or a volatile memory;

providing a source region; and

providing a drain region including at least a first drain region and a second separate drain region; and

capacitively coupling a variable portion of said gate to said drain based on selectively coupling either or both of said first drain region and said second separate drain region;

providing a variable programming voltage to said drain region, wherein a substantial portion of said variable programming voltage is also imparted to said floating gate through said capacitive coupling and in an amount corresponding to said selective coupling;

wherein said floating gate is adapted to store multiple levels of charge corresponding to said variable programming voltage.

Assignments (8)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073941/0814 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0745 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
CHANGE OF NAME Recorded Dec 10, 2012
From: TESSERA INTELLECTUAL PROPERTIES, INC.
To: INVENSAS CORPORATION
Reel/Frame 029475/0708 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2012
From: JONKER LLC
To: TESSERA INTELLECTUAL PROPERTIES, INC.
Reel/Frame 029458/0954 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2012
From: LIU, DAVID K.Y.; GROSS, JOHN NICHOLAS
To: JONKER LLC
Reel/Frame 029449/0904 →