IP Library Granted Patent US 8,901,658
Granted Patent B2
US 8,901,658 · App. 13/705,151 · Granted Dec 2, 2014

Thin film transistor

Inventors: Henry Wang (Hsinchu, TW); Chia-Chun Yeh (Hsinchu, TW); Xue-Hung Tsai (Hsinchu, TW); Ted-Hong Shinn (Hsinchu, TW)
Assignee: E Ink Holdings Inc.
H01L29/78693H01L29/2206H01L29/41725H01L29/41733H01L29/1869
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Quick Facts
Patent No.
US 8,901,658
App. No.
13/705,151
Granted
Dec 2, 2014
Kind
B2
Abstract

A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.

Claims (27)

1. A thin film transistor, comprising:

a gate;

a semiconductor layer, having a first end and a second end opposite to the first end;

an insulation layer, disposed between the gate and the semiconductor layer and having a first surface facing away from the gate, wherein the semiconductor layer has a second surface facing the gate and a third surface facing away from the gate;

a source, clamping the first end of the semiconductor layer and the source having:

a first electrode portion, connected to the first end of the semiconductor layer and disposed on the third surface; and

a second electrode portion, connected to the first electrode portion and the first end of the semiconductor layer, wherein at least a part of the second electrode portion is disposed between the first surface and the second surface; and

a drain, clamping the second end of the semiconductor layer and the drain having:

a third electrode portion, connected to the second end of the semiconductor layer and disposed on the third surface; and

a fourth electrode portion, connected to the third electrode portion and the second end of the semiconductor layer, wherein at least a part of the fourth electrode portion is disposed between the first surface and the second surface,

wherein an orthogonal projection of the gate onto the second surface and the second electrode portion are not overlapped with each other, the orthogonal projection of the gate onto the second surface and the fourth electrode portion are not overlapped with each other, the orthogonal projection of the gate onto the second surface and the first electrode portion are overlapped with each other, and the orthogonal projection of the gate onto the second surface and the third electrode portion are overlapped with each other.

2. The thin film transistor as claimed in claim 1 , wherein the second electrode portion and the fourth electrode portion are respectively located at two opposite sides of the orthogonal projection of the gate onto the second surface.

3. The thin film transistor as claimed in claim 1 , wherein the first electrode portion extends to a first position from the first end toward the third electrode portion along the third surface, the third electrode portion extends to a second position from the second end toward the first electrode portion along the third surface, a first orthogonal projection of the first position onto the first surface is located between the second electrode portion and a second orthogonal projection of the second position onto the first surface, the second orthogonal projection is located between the first orthogonal projection and the fourth electrode portion, and the second electrode portion, the first orthogonal projection, the second orthogonal projection and the fourth electrode portion are separated from each other.

4. The thin film transistor as claimed in claim 1 , wherein a thicknesses of each of the second electrode portion and the fourth electrode portion ranges from 2 nm to 300 nm.

5. The thin film transistor as claimed in claim 4 , wherein the thicknesses of each of the second electrode portion and the fourth electrode portion ranges from 10 nm to 100 nm.

6. The thin film transistor as claimed in claim 1 , wherein material of the second electrode portion and the fourth electrode portion is metal, metal oxide, or a combination thereof.

7. The thin film transistor as claimed in claim 6 , wherein the material of the second electrode portion and the fourth electrode portion comprises molybdenum-chrome alloy, aluminium-molybdenum alloy, molybdenum, copper, indium tin oxide or a combination thereof.

8. The thin film transistor as claimed in claim 1 , wherein material of the semiconductor layer is metal-oxide semiconductor.

9. The thin film transistor as claimed in claim 8 , wherein the metal-oxide semiconductor comprises indium zinc oxide (IZO), zinc oxide (ZnO), aluminium doped zinc oxide (AZO), indium gallium zinc oxide (IGZO) or a combination thereof.

10. The thin film transistor as claimed in claim 1 , further comprising a substrate, wherein the gate is disposed between the substrate and the semiconductor layer.

11. The thin film transistor as claimed in claim 10 , further comprising:

a protection layer, covering the source, the semiconductor layer and the drain, wherein the protection layer has a through-hole and the through-hole exposes at least a part of the drain; and

a conductive material, filled into the through-hole and covering a part of the protection layer.

12. The thin film transistor as claimed in claim 1 , further comprising a substrate, wherein the semiconductor layer is disposed between the substrate and the gate.

13. The thin film transistor as claimed in claim 12 , further comprising:

a protection layer, covering the gate and the insulation layer, wherein the protection layer has a first through-hole, the insulation layer has a second through-hole, and the first through-hole and the second through-hole are communicated with each other and expose at least a part of the drain; and

a conductive material, filled into the first through-hole and the second through-hole and covering a part of the protection layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2026
From: E INK HOLDINGS INC.
To: TRANSCEND OPTRONICS (YANGZHOU) CO., LTD
Reel/Frame 073680/0182 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2012
From: WANG, HENRY; YEH, CHIA-CHUN; TSAI, XUE-HUNG; SHINN, TED-HONG
To: E INK HOLDINGS INC.
Reel/Frame 029422/0840 →
Priority Claims (1)
TW 101104104 A · Feb 8, 2012 · national
Continuity (1)
Related Publication 20130200362A1 · Aug 8, 2013