IP Library Granted Patent US 8,759,863
Granted Patent B2
US 8,759,863 · App. 13/706,527 · Granted Jun 24, 2014

Semiconductor light-emitting device and method for manufacturing same

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Quick Facts
Patent No.
US 8,759,863
App. No.
13/706,527
Granted
Jun 24, 2014
Kind
B2
Abstract

A semiconductor light-emitting device of the invention includes: a semiconductor layer including a light-emitting layer and having a first major surface and a second major surface opposite to the first major surface; a phosphor layer facing to the first major surface; an interconnect layer provided on the second major surface side and including a conductor and an insulator; and a light-blocking member provided on a side surface of the semiconductor layer and being opaque to light emitted from the light-emitting layer.

Claims (27)

1. A semiconductor light-emitting device comprising:

a semiconductor layer including a light-emitting layer, the semiconductor layer having a first major surface and a second major surface opposite to the first major surface;

an n-side electrode and a p-side electrode provided on the semiconductor layer;

an n-side interconnect layer connected to the n-side electrode;

a p-side interconnect layer connected to the p-side electrode;

a resin provided in contact with the n-side interconnect layer and the p-side interconnect layer between the n-side interconnect layer and the p-side interconnect layer;

a light-blocking member provided outside the semiconductor layer; and

a phosphor layer provided on the first major surface side,

a substrate for growth of the semiconductor layer not being interposed between the first major surface and the phosphor layer.

2. The device of claim 1 , wherein the light-blocking member includes a metal.

3. The device of claim 1 , wherein the light-blocking member includes a resin.

4. The device of claim 3 , wherein the resin of the light-blocking member includes a carbon black.

5. The device of claim 1 , wherein the light-blocking member is a metal, and a side surface of the metal is not exposed on an outside of the semiconductor light-emitting device.

6. The device of claim 1 , wherein the resin provided between the n-side interconnect layer and the p-side interconnect layer is opaque to light emitted from the light-emitting layer.

7. The device of claim 1 , wherein the n-side interconnect layer includes an n-side interconnect provided on the n-side electrode and an n-side metal pillar provided on the n-side interconnect, the p-side interconnect layer includes a p-side interconnect provided on the p-side electrode and a p-side metal pillar provided on the p-side interconnect.

8. The device of claim 7 , wherein a part of the n-side interconnect extends to a side surface of the semiconductor layer as the light-blocking member.

9. The device of claim 7 , wherein the n-side interconnect, the p-side interconnect, the n-side metal pillar and the p-side metal pillar contain a copper.

10. The device of claim 7 , wherein the n-side metal pillar, the p-side metal pillar, and the resin provided between the n-side metal pillar and the p-side metal pillar are thicker than the semiconductor layer.

11. The device of claim 1 , wherein the n-side interconnect layer and the p-side interconnect layer include a seed metal provided on the semiconductor layer side, and a part of the seed metal is provided as the light-blocking member.

12. The device of claim 1 , wherein the resin covers around the n-side interconnect layer and the p-side interconnect layer.

13. The device of claim 12 , wherein the resin is opaque to light emitted from the light-emitting layer, and the resin is provided as the light-blocking member.

14. The device of claim 1 , further comprising external terminals provided on the n-side interconnect layer and the p-side interconnect layer.

15. The device of claim 14 , wherein the external terminals are solder balls or metal bumps.

16. The device of claim 1 , further comprising an insulating film provided on the n-side electrode and the p-side electrode, the insulating film having a first opening which reaches the n-side electrode and a second opening which reaches the p-side electrode, wherein the n-side interconnect layer is provided in the first opening, and the p-side interconnect layer is provided in the second opening.

17. The device of claim 1 , wherein the phosphor layer has a third major surface facing to the first major surface, and

the light-blocking member is provided below the third major surface of the phosphor layer.

18. The device of claim 1 , wherein the resin provided between the n-side interconnect layer and the p-side interconnect layer is opaque to a light emitted by the light-emitting layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2018
From: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 046986/0159 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2018
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 046364/0164 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2012
From: SUGIZAKI, YOSHIAKI; KOJIMA, AKIHIRO; OBATA, SUSUMU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 029416/0551 →