ESD protection system optimized at board level
An electronic system protected against an incoming energy pulse, comprising a semiconductor device ( 310 a, 310 b ) connected in sequential order to a first impedance ( 320 ), a coupling noise filter ( 330 ) having an internal frequency-dependent second impedance ( 331 ), a third impedance ( 340 ), a transient voltage suppressor ( 350 ), a fourth impedance ( 360 ), and an entry port exposed to the incoming energy pulse ( 380 ). The fourth impedance has a size suitable for supporting the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor; the third impedance has a size suitable for supporting and synchronizing the performance of the coupling noise filter to filter common mode noise from two phase lags between differential signals; and the first impedance has a size suitable for diminishing, in combination with the second impedance as operational in the active frequency regime, the un-discharged portion of the energy pulse to a value under the device threshold failure current.
1. An electronic system protected against an incoming energy pulse, comprising:
a semiconductor device connected in sequential order to a first impedance, a coupling noise filter having an internal frequency-dependent second impedance, a third impedance, a transient voltage suppressor, a fourth impedance, and an entry port exposed to the incoming energy pulse;
the fourth impedance suitable for supporting the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor;
the third impedance suitable for supporting and synchronizing the performance of the coupling noise filter to filter common mode noise from two phase lags between differential signals; and
the first impedance suitable for diminishing, in combination with the second impedance as operational in the active frequency regime, the un-discharged portion of the energy pulse to a value under the device threshold failure current.
2. The system of claim 1 wherein the first impedance is frequency dependent (RLC).
3. The system of claim 1 wherein the coupling noise filter is a common mode filter suitable for differential device pins requiring high frequency response.
4. The system of claim 1 wherein the coupling noise filter is a chip ferrite inductor suitable for a device pin not requiring high frequency response.
5. An electronic system protected against an incoming energy pulse, comprising:
a semiconductor device connected in sequential order to a layout impedance, a transient voltage suppressor, a tying impedance, and an entry port exposed to the incoming energy pulse;
the tying impedance suitable for supporting the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor; and
the layout impedance being frequency dependent (RLC) and suitable for diminishing the un-discharged portion of the energy pulse to a value under the device threshold failure current.
6. A method for fabricating an electronic system protected against an incoming energy pulse, comprising the steps of:
connecting in sequential order a semiconductor device, a first impedance, a coupling noise filter having an internal frequency-dependent second impedance, a third impedance, a transient voltage suppressor, a fourth impedance, and an entry port exposed to the incoming energy pulse;
selecting the fourth impedance to support the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor;
selecting the third impedance to support and synchronize the performance of the coupling noise filter in filtering common mode noise from two phase lags between differential signals;
analyzing the second impedance in the frequency regime applicable for the coupling noise filter operation; and
selecting the first impedance to diminish, in combination with the second impedance as operational in the active frequency regime, the un-discharged portion of the energy pulse to a value under the device threshold failure current.
7. The method of claim 6 wherein the first impedance is frequency dependent (RLC).
8. The method of claim 6 wherein the coupling noise filter is a common mode filter suitable for differential device pins requiring high frequency response.
9. The system of claim 6 wherein the coupling noise filter is a chip ferrite inductor suitable for a device pin not requiring high frequency response.
10. A method for fabricating an electronic system protected against an incoming energy pulse, comprising the steps of:
connecting in sequential order a semiconductor device, a layout impedance, a transient voltage suppressor, a tying impedance, and an entry port exposed to the incoming energy pulse;
selecting the tying impedance to support the transient voltage suppressor in discharging a portion of the incoming energy pulse up to the full capability of the suppressor; and
selecting the layout impedance as frequency dependent, operable to diminish the un-discharged portion of the energy pulse to a value under the device threshold failure current.