IP Library Granted Patent US 8,829,514
Granted Patent B2
US 8,829,514 · App. 13/711,540 · Granted Sep 9, 2014

Thin film transistor and method for manufacturing the same

Inventors: Hsiao-Wen Zan (Hsinchu, TW); Chuang-Chuang Tsai (Hsinchu, TW); Chun-Hung Liao (Hsinchu, TW); Wei-Tsung Chen (Hsinchu, TW)
Assignee: E Ink Holdings Inc.
H01L29/78H01L29/66742
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Quick Facts
Patent No.
US 8,829,514
App. No.
13/711,540
Granted
Sep 9, 2014
Kind
B2
Abstract

Disclosed herein is a thin film transistor, which includes a metal oxide semiconductor layer, an insulating layer, a gate electrode, a source electrode and a drain electrode. The metal oxide semiconductor layer includes a channel region having at least one first region and a second region. The first region has an oxygen vacancy concentration greater than an oxygen vacancy concentration of the second region. The second region surrounds the first region. A method for manufacturing the thin film transistor is disclosed as well.

Claims (23)

1. A thin film transistor, comprising:

a metal oxide semiconductor layer comprising:

a channel region having at least one first region and a second region, wherein the first region has a resitivity less than a resitivity of the second region, wherein the first region is surrounded by the second region; and

a source region and a drain region respectively disposed at opposite sides of the channel region;

a first insulating layer disposed on the channel region;

a first gate electrode disposed on the first insulating aver and having at least one first opening positioned above the first region; and

a source electrode and a drain electrode respectively connected electrically to the source region and the drain region.

2. The thin film transistor according to claim 1 , wherein the channel region has a plurality of the first regions, and each of the first regions is spaced apart from another one of the first regions.

3. The thin film transistor according to claim 2 , wherein the first gate electrode has a plurality of the first openings penetrating the first gate electrode, and each of the first openings is positioned right above a corresponding one of the first regions.

4. The thin film transistor according to claim 3 , wherein each of the first openings has a contour that is substantially the same as a contour of the corresponding one of the first regions.

5. The thin film transistor according to claim 3 , wherein the first insulating layer has a plurality of second openings penetrating the first insulating layer, and each of the second openings is substantially aligned with a corresponding one of the first openings.

6. The thin film transistor according to claim 2 , wherein each of the first regions has a width of about 1 nm to about 1 μm.

7. The thin film transistor according to claim 2 , wherein each of the first regions has a geometry center, and a distance between any two adjacent geometry centers is about 51 nm to about 1500 nm.

8. The thin film transistor according to claim 2 , wherein a spacing, interval between any two adjacent first regions is about 50 nm to about 500 nm.

9. The thin film transistor according to claim 2 , wherein the first regions are arranged in a number density of about 10 6 mm −2 to about 1×10 7 mm −2 .

10. The thin film transistor according to claim 1 , wherein a ratio of an oxygen vacancy concentration of the first region to an oxygen vacancy concentration of the second region ranges from about 1.1 to about 1.3.

11. The thin film transistor according to claim 1 , wherein the metal oxide semiconductor layer comprises indium gallium zinc oxide (IGZO).

12. The thin film transistor according to claim 1 , further comprising a second gate electrode and a second insulating layer, wherein the first and second gate electrodes are respectively disposed at opposite sides of the metal oxide semiconductor layer, and the second insulating layer is positioned between the second gate electrode and the metal oxide semiconductor layer.

13. The thin film transistor according to claim 12 , further comprising a substrate, wherein the second gate electrode is disposed on the substrate, the second insulating layer covers the second gate electrode, and the metal oxide semiconductor layer is positioned on the second insulating layer.

14. The thin film transistor according to claim 12 , wherein the second gate electrode overlaps the first gate electrode in a direction perpendicular to the metal oxide semiconductor layer.

15. The thin film transistor according to claim 12 , wherein the second gate electrode has an area that is greater than or equal to an area of the first gate electrode.

16. The thin film transistor according to claim 1 , wherein the first opening has a contour that is substantially the same as a contour of the first region.

17. The thin film transistor according to claim 1 , wherein the first insulating layer has at least one second opening penetrating the first insulating layer, and the second opening is substantially aligned with the first opening.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2026
From: E INK HOLDINGS INC.
To: TRANSCEND OPTRONICS (YANGZHOU) CO., LTD
Reel/Frame 073680/0182 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2012
From: ZAN, HSIAO-WEN; TSAI, CHUANG-CHUANG; LIAO, CHUN-HUNG; CHEN, WEI-TSUNG
To: E INK HOLDINGS INC.
Reel/Frame 029458/0369 →
Priority Claims (2)
TW 101121927 A · Jun 19, 2012 · national
TW 101139494 A · Oct 25, 2012 · national
Continuity (2)
Provisional Application 61570303 · Dec 14, 2011
Related Publication 20130153891A1 · Jun 20, 2013