Methods of forming a finfet semiconductor device with undoped fins
View Patent ↗One method disclosed herein includes, prior to forming an isolation region in a semiconducting substrate for the device, forming a doped well region and a doped punch-stop region in the substrate, introducing a dopant material that is adapted to retard diffusion of boron or phosphorous into the substrate to form a dopant-containing layer proximate an upper surface of the substrate, performing an epitaxial deposition process to form an undoped semiconducting material above the dopant-containing layer, forming a plurality of spaced-apart trenches that extend at least partially into the substrate, wherein the trenches define a fin for the device comprised of at least the undoped semiconducting material, forming at least a local isolation insulating material in the trenches, and forming a gate structure around at least the undoped semiconducting material, wherein a bottom of a gate electrode is positioned approximately level with or below a bottom of the undoped semiconducting material.
1. A method of forming a device in and above a semiconducting substrate, comprising:
prior to forming an isolation region in said substrate for said device, forming a doped well region and a doped punch-stop region in said substrate;
introducing dopant material into said substrate to form a dopant-containing layer proximate an upper surface of said substrate, wherein said dopant material is adapted to retard diffusion of boron or phosphorous;
performing an epitaxial deposition process to form an undoped semiconducting material above said dopant-containing layer;
forming a plurality of spaced-apart trenches that extend at least partially into said substrate, said trenches defining a fin for said device comprised of at least said undoped semiconducting material;
forming at least a local isolation insulating material in said trenches; and
forming a gate structure around at least said undoped semiconducting material, wherein a bottom of a gate electrode of said gate structure is positioned approximately level with or below a bottom of said undoped semiconducting material.
2. The method of claim 1 , wherein introducing said dopant material into said substrate to form said dopant-containing layer comprises performing a plasma doping process to introduce said dopant material into said substrate to form said dopant-containing layer.
3. The method of claim 1 , wherein said dopant material is comprised of one of carbon or germanium.
4. The method of claim 1 , wherein said undoped semiconductor material is comprised of one of silicon, silicon-germanium, or a III-V material.
5. The method of claim 1 , wherein said gate structure comprises a gate insulation layer comprised of a high-k insulating material and wherein said gate electrode is comprised of at least one layer of metal.
6. The method of claim 1 , wherein said step of forming at least said local isolation insulating material in said trenches also forms a device isolation region for said device.
7. The method of claim 1 , further comprising introducing one of carbon or silicon into said local isolation insulating material to form a carbon-rich or silicon-rich, respectively, etch-resistant region proximate an upper surface of said local isolation insulating material.
8. The method of claim 7 , wherein, prior to introducing said carbon or silicon into said local isolation insulating material, forming sidewall spacers on at least said undoped semiconducting material.
9. A method of forming a device in and above a semiconducting substrate, comprising:
prior to forming an isolation region in said substrate for said device, forming a doped well region and a doped punch-stop region in said substrate;
performing a plasma doping process to introduce a dopant material comprised of one of carbon or germanium into said substrate to form a dopant-containing layer proximate an upper surface of said substrate;
performing an epitaxial deposition process to form an undoped semiconducting material above said dopant-containing layer;
forming a plurality of spaced-apart trenches that extend at least partially into said substrate, said trenches defining a fin for said device comprised of at least said undoped semiconducting material;
forming at least a local isolation insulating material in said trenches; and
forming a gate structure around at least said undoped semiconducting material, wherein a bottom of a gate electrode of said gate structure is positioned approximately level with or below a bottom of said undoped semiconducting material.
10. The method of claim 9 , wherein said undoped semiconductor material is comprised of one of silicon, silicon-germanium, or a III-V material.
11. The method of claim 9 , wherein said step of forming at least said local isolation insulating material in said trenches also forms a device isolation region for said device.
12. The method of claim 9 , further comprising introducing one of carbon or silicon into said local isolation insulating material to form a carbon-rich or silicon-rich, respectively, etch-resistant region proximate an upper surface of said local isolation insulating material.
13. The method of claim 12 , wherein, prior to introducing said carbon or silicon into said local isolation insulating material, forming sidewall spacers on at least said undoped semiconducting material.
14. A method of forming a device in and above a semiconducting substrate, comprising:
prior to forming an isolation region in said substrate for said device, forming a doped well region and a doped punch-stop region in said substrate;
performing at least one epitaxial deposition process to form a dopant-containing semiconducting material on said substrate and to form an undoped semiconducting material on said dopant-containing semiconducting material, wherein said dopant-containing semiconducting material is comprised of a dopant material that is adapted to retard diffusion of boron or phosphorous;
forming a plurality of spaced-apart trenches that extend at least partially into said substrate, said trenches defining a fin for said device comprised of at least said undoped semiconducting material;
forming at least a local isolation insulating material in said trenches; and
forming a gate structure around at least said undoped semiconducting material, wherein a bottom of a gate electrode of said gate structure is positioned approximately level with or below a bottom of said undoped semiconducting material.
15. The method of claim 14 , wherein forming said dopant-containing semiconducting material comprises introducing said dopant material during a first portion of said at least one epitaxial deposition process.
16. The method of claim 15 , wherein said dopant material is comprised of at least one of carbon or germanium.
17. The method of claim 14 , wherein said dopant-containing layer of semiconducting material and said undoped semiconductor material are each comprised of one of silicon, silicon-germanium or a III-V material.
18. The method of claim 14 , wherein said step of forming at least said local isolation insulating material in said trenches also forms a device isolation region for said device.
19. The method of claim 14 , further comprising introducing one of carbon or silicon into said local isolation insulating material to form a carbon-rich or silicon-rich, respectively, etch-resistant region proximate an upper surface of said local isolation insulating material.
20. The method of claim 19 , wherein, prior to introducing said carbon or silicon into said local isolation insulating material, forming sidewall spacers on at least said undoped semiconducting material.
21. A method of forming a device in and above a semiconducting substrate, comprising:
prior to forming an isolation region in said substrate for said device, forming a doped well region and a doped punch-stop region in said substrate;
performing at least one epitaxial deposition process to form a dopant-containing semiconducting material comprised of at least one of carbon or germanium on said substrate and to form an undoped semiconducting material on said dopant-containing semiconducting material;
forming a plurality of spaced-apart trenches that extend at least partially into said substrate, said trenches defining a fin for said device comprised of at least said undoped semiconducting material;
forming at least a local isolation insulating material in said trenches; and
forming a gate structure around at least said undoped semiconducting material, wherein a bottom of a gate electrode of said gate structure is positioned approximately level with or below a bottom of said undoped semiconducting material.
22. The method of claim 21 , wherein forming said dopant-containing semiconducting material comprises introducing said at least one of said carbon or germanium during a first portion of said at least one epitaxial deposition process.
23. The method of claim 22 , wherein said dopant-containing layer of semiconducting material and said undoped semiconductor material are each comprised of one of silicon, silicon-germanium or a III-V material.
24. The method of claim 21 , wherein said step of forming at least said local isolation insulating material in said trenches also forms a device isolation region for said device.
25. The method of claim 21 , further comprising introducing one of carbon or silicon into said local isolation insulating material to form a carbon-rich or silicon-rich, respectively, etch-resistant region proximate an upper surface of said local isolation insulating material.
26. The method of claim 25 , wherein, prior to introducing said carbon or silicon into said local isolation insulating material, forming sidewall spacers on at least said undoped semiconducting material.