Integrated circuits including integrated passive devices and methods of manufacture thereof
View Patent ↗Embodiments of integrated passive devices (e.g., metal insulator metal, or MIM, capacitors) and methods of their formation include depositing a composite electrode over a semiconductor substrate (e.g., on a dielectric layer above the substrate surface), and depositing an insulator layer over the composite electrode. The composite electrode includes an underlying electrode and an overlying electrode deposited on a top surface of the underlying electrode. The underlying electrode is formed from a first conductive material (e.g., AlCuW), and the overlying electrode is formed from a second, different conductive material (e.g., AlCu). The top surface of the underlying electrode may have a relatively rough surface morphology, and the top surface of the overlying electrode may have a relatively smooth surface morphology. For high frequency, high power applications, both the composite electrode and the insulator layer may be thicker than in some conventional integrated passive devices.
1. A method of manufacturing an integrated circuit, the method comprising the steps of:
forming an integrated passive device over a first dielectric layer by
forming a composite electrode over a semiconductor substrate, wherein the composite electrode includes an underlying electrode and an overlying electrode deposited on a top surface of the underlying electrode, wherein the underlying electrode is formed from a first conductive material that includes AlCuW, and the overlying electrode is formed from a second conductive material that is different from the first conductive material, and that includes AlCu, and
forming an insulator layer over the composite electrode.
2. The method of claim 1 , wherein forming the composite electrode comprises:
depositing the underlying electrode on the first dielectric layer, wherein the underlying electrode has a thickness in a range of about 1.0 microns to about 2.0 microns; and
depositing the overlying electrode on the top surface of the underlying electrode, wherein the overlying electrode has a thickness in a range of about 0.1 microns to about 0.3 microns.
3. The method of claim 1 , wherein the integrated passive device is a metal-insulator-metal (MIM) capacitor, the composite electrode is a composite bottom electrode of the MIM capacitor, the insulator layer is an insulator of the MIM capacitor, and the method further comprises:
forming a top electrode of the MIM capacitor over the insulator layer.
4. The method of claim 3 , further comprising:
forming a second dielectric layer over the top electrode;
forming a first opening through the second dielectric layer that exposes a portion of the top electrode;
forming a second opening through the second dielectric layer and the insulator layer that exposes a portion of the composite bottom electrode;
forming a metal layer over the second dielectric layer; and
patterning the metal layer to form a top electrode contact that extends through the first opening to contact the top electrode, and a bottom electrode contact that extends through the second opening to contact the composite bottom electrode.
5. The method of claim 3 , further comprising:
forming a laterally diffused metal oxide semiconductor transistor in the semiconductor substrate; and
electrically coupling the laterally diffused metal oxide semiconductor transistor to the MIM capacitor.
6. An integrated circuit comprising:
an integrated passive device that includes
a composite electrode deposited over a semiconductor substrate, wherein the composite electrode includes an underlying electrode and an overlying electrode deposited on a top surface of the underlying electrode, wherein the underlying electrode is formed from a first conductive material that includes AlCuW, and the overlying electrode is formed from a second conductive material that includes AlCu, and wherein the top surface of the underlying electrode has a relatively rough surface morphology, and a top surface of the overlying electrode has a relatively smooth surface morphology; and
an insulator layer deposited over the composite electrode.
7. The integrated circuit of claim 1 , wherein the composite electrode has a thickness in a range of about 1.0 microns to about 2.0 microns.
8. The integrated circuit of claim 1 , wherein:
the underlying electrode has a thickness in a range of about 1.0 microns to about 2.0 microns; and
the overlying electrode has a thickness in a range of about 0.1 microns to about 0.3 microns.
9. The integrated circuit of claim 1 , wherein the insulator layer is formed from a material selected from a plasma enhanced nitride and a plasma enhanced oxide.
10. The integrated circuit of claim 1 , wherein the insulator layer has a thickness in a range of about 1500 angstroms to about 2500 angstroms.
11. The integrated circuit of claim 1 , wherein the integrated passive device is a metal-insulator-metal (MIM) capacitor, the composite electrode forms a composite bottom electrode of the MIM capacitor, the insulator layer forms an insulator of the MIM capacitor, and the MIM capacitor further comprises:
a top electrode over the insulator layer.
12. The integrated circuit of claim 11 , wherein the top electrode is formed from one or more materials selected from Ti and TiN.
13. The integrated circuit of claim 11 , wherein the insulator layer includes an opening that exposes a portion of the composite bottom electrode, the integrated passive device further comprising:
a patterned dielectric layer over the top electrode, wherein the patterned dielectric layer includes a first opening that exposes a portion of the top electrode and a second opening aligned with the opening in the insulator layer; and
a patterned metal layer over the patterned dielectric layer, wherein the patterned metal layer includes a top electrode contact that extends through the first opening to contact the top electrode, and a bottom electrode contact that extends through the second opening and the opening in the insulator layer to contact the composite bottom electrode.
14. An integrated circuit comprising:
a metal-insulator-metal (MIM) capacitor that includes
a composite bottom electrode deposited over a semiconductor substrate, wherein the composite bottom electrode includes an underlying electrode and an overlying electrode deposited on a top surface of the underlying electrode, wherein the underlying electrode is formed from a first conductive material that includes AlCuW, and the overlying electrode is formed from a second conductive material that is different from the first conductive material, and that includes AlCu;
an insulator layer deposited over the composite bottom electrode; and
a top electrode deposited over the insulator layer.
15. The integrated circuit of claim 14 , wherein the composite bottom electrode has a thickness in a range of about 1.0 microns to about 2.0 microns.
16. The integrated circuit of claim 14 , wherein:
the underlying electrode has a thickness in a range of about 1.0 microns to about 2.0 microns; and
the overlying electrode has a thickness in a range of about 0.1 microns to about 0.3 microns.
17. The integrated circuit of claim 14 , further comprising:
a laterally diffused metal oxide semiconductor transistor electrically coupled to the MIM capacitor.