IP Library Patent Application 13723527
Patent Application
App. No. 13/723,527

COMPOUND SEMICONDUCTOR AND METHOD OF MANUFACTURING THE SAME

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Quick Facts
Patent No.
US None
App. No.
13/723,527
Abstract

An embodiment of a compound semiconductor device includes: a substrate; an electron transport layer and an electron supply layer formed over the substrate; a gate electrode, a source electrode and a drain electrode formed over the electron supply layer; a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and a hole canceling layer formed between the electron supply layer and the p-type semiconductor layer, the hole canceling layer containing a donor or a recombination center and canceling a hole.

Claims (44)

1 . A compound semiconductor device, comprising:

a substrate;

an electron transport layer and an electron supply layer formed over the substrate;

a gate electrode, a source electrode and a drain electrode formed over the electron supply layer;

a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and

a hole canceling layer formed between the electron supply layer and the p-type semiconductor layer, the hole canceling layer containing a donor or a recombination center and canceling a hole.

2 . The compound semiconductor device according to claim 1 , wherein the p-type semiconductor layer is a GaN layer which contains Mg.

3 . The compound semiconductor device according to claim 1 , wherein the hole canceling layer contains a p-type impurity.

4 . The compound semiconductor device according to claim 3 , wherein the hole canceling layer contains Mg as the p-type impurity.

5 . The compound semiconductor device according to claim 1 , wherein the hole canceling layer contains Si as the donor.

6 . The compound semiconductor device according to claim 1 , wherein the hole canceling layer contains at least one selected from the group Fe, Cr, Co, Ni, Ti, V, and Sc as the recombination center.

7 . The compound semiconductor device according to claim 1 , further comprising a hole barrier layer formed between the electron supply layer and the p-type semiconductor layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

8 . The compound semiconductor device according to claim 7 , wherein composition of the electron supply layer is represented by Al x Ga 1-x N (0<x<1), and

composition of the hole barrier layer is represented by Al y Ga 1-y N (x<y<1).

9 . The compound semiconductor device according to claim 7 , wherein

composition of the electron supply layer is represented by Al x Ga 1-x N (0<x<1), and

composition of the hole barrier layer is represented by In z Ai 1-z N (0≦z≦1).

10 . The compound semiconductor device according to claim 1 , further comprising a gate insulating film formed between the gate electrode and the p-type semiconductor layer.

11 . The compound semiconductor device according to claim 1 , further comprising a termination film that covers the electron supply layer in each of a region between the gate electrode and the source electrode and a region between the gate electrode and the drain electrode.

12 . A power supply apparatus, comprising

a compound semiconductor device, which comprises:

a substrate;

an electron transport layer and an electron supply layer formed over the substrate;

a gate electrode, a source electrode and a drain electrode formed over the electron supply layer;

a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and

a hole canceling layer formed between the electron supply layer and the p-type semiconductor layer, the hole canceling layer containing a donor or a recombination center, and canceling a hole.

13 . An amplifier, comprising

a compound semiconductor device, which comprises:

a substrate;

an electron transport layer and an electron supply layer formed over the substrate;

a gate electrode, a source electrode and a drain electrode formed over the electron supply layer;

a p-type semiconductor layer formed between the electron supply layer and the gate electrode; and

a hole canceling layer formed between the electron supply layer and the p-type semiconductor layer, the hole canceling layer containing a donor or a recombination center, and canceling a hole.

14 . A method of manufacturing a compound semiconductor device, comprising:

forming an electron transport layer and an electron supply layer over a substrate;

forming a gate electrode, a source electrode and a drain electrode over the electron supply layer;

forming a p-type semiconductor layer which is located between the electron supply layer and the gate electrode, before the forming the gate electrode; and

forming a hole canceling layer which is located between the electron supply layer and the p-type semiconductor layer, before the forming the p-type semiconductor layer, the hole canceling layer containing a donor or a recombination center and canceling a hole.

15 . The method of manufacturing a compound semiconductor device according to claim 14 , wherein the p-type semiconductor layer is a GaN layer which contains Mg.

16 . The method of manufacturing a compound semiconductor device according to claim 14 , wherein the hole canceling layer contains a p-type impurity.

17 . The method of manufacturing a compound semiconductor device according to claim 16 , wherein the hole canceling layer contains Mg as the p-type impurity.

18 . The method of manufacturing a compound semiconductor device according to claim 14 , wherein the hole canceling layer contains Si as the donor.

19 . The method of manufacturing a compound semiconductor device according to claim 14 , wherein the hole canceling layer contains at least one selected from the group Fe, Cr, Co, Ni, Ti, V, and Sc as the recombination center.

20 . The method of manufacturing a compound semiconductor device according to claim 14 , further comprising forming a hole barrier layer which is located between the electron supply layer and the hole canceling layer, before the forming the hole canceling layer, a band gap of the hole barrier layer being larger than that of the electron supply layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: FUJITSU LIMITED
To: TRANSPHORM JAPAN, INC.
Reel/Frame 032865/0196 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2013
From: IMANISHI, KENJI
To: FUJITSU LIMITED
Reel/Frame 029630/0673 →