Active matrix display device
A driving circuit for driving a display panel includes a dynamic ratioless shift register which is operated in a stable manner and can expand the degree of freedom of design. In the dynamic ratioless shift register which is provided with thin film transistors having semiconductor layers made of p-Si on a substrate surface, a node which becomes the floating state is connected to a fixed potential through a capacitance element.
1. A driving circuit for driving a display panel comprising:
a shift register formed on the display panel;
the shift register including a connection of a plurality of stages,
a first stage thereof including a first transistor and a second transistor,
a second stage thereof including a third transistor and a fourth transistor,
the first transistor including a control electrode, an input electrode and an output electrode;
a first synchronous pulse input line connected to the input electrode of the first transistor;
the third transistor including a control electrode, an input electrode and an output electrode;
a second synchronous pulse input line connected to the input electrode of the third transistor; and
wherein a voltage of the control electrode of the first transistor is boosted by a voltage of the first synchronous pulse changing from a low level to a high level,
the second transistor connects the control electrode of the first transistor and a constant voltage line when the second transistor is in an on state,
a voltage of the control electrode of the third transistor is boosted by a voltage of the second synchronous pulse changing from a low level to a high level,
the fourth transistor connects the control electrode of the third transistor and a constant voltage line when the fourth transistor is in an on state, and
the first stage outputs a signal for switching the fourth transistor to an off state.
2. A driving circuit according to claim 1 ,
wherein the first transistor outputs a scanning signal to the display panel and the fourth transistor outputs a scanning signal to the display panel.
3. A driving circuit for driving a scanning line of a display panel comprising
a shift register formed on the display panel;
the shift register including a connection of a plurality of stages,
a first stage thereof including a first transistor and a second transistor,
a second stage thereof including a third transistor and a fourth transistor,
the first transistor including a control electrode, an input electrode and an output electrode;
a first synchronous pulse input line connected to the input electrode of the first transistor;
the third transistor including a control electrode, an input electrode and an output electrode;
a second synchronous pulse input line connected to the input electrode of the third transistor; and
wherein a voltage of the control electrode of the first transistor is boosted by a voltage of the first synchronous pulse changing from a low level to a high level,
the second transistor connects the control electrode of the first transistor and a constant voltage line when the second transistor is in an on state,
a voltage of the control electrode of the third transistor is boosted by a voltage of the second synchronous pulse changing from a low level to a high level,
the fourth transistor connects the control electrode of the third transistor and a constant voltage line when the fourth transistor is in an on state, and
the first stage outputs a signal for switching the fourth transistor to an off state.
4. A driving circuit according to claim 3 ,
wherein the first transistor outputs a scanning signal to the scanning line and the fourth transistor outputs a scanning signal to the scanning line.
5. A driving circuit for driving a scanning line of a display panel comprising:
a ratioless dynamic shift register formed on the display panel and outputting a scanning signal to the scanning line;
the ratioless dynamic shift register including a connection of a plurality of stages,
a first stage thereof including a first transistor and a second transistor,
a second stage thereof including a third transistor and a fourth transistor,
the first transistor including a control electrode, an input electrode and an output electrode;
the third transistor including a control electrode, an input electrode and an output electrode;
a first synchronous pulse input line connected to the input electrode of the first transistor;
a second synchronous pulse input line connected to the input electrode of the third transistor; and
wherein a voltage of the control electrode of the first transistor is boosted by a voltage of the first synchronous pulse changing from a low level to a high level,
the second transistor connects the control electrode of the first transistor and a constant voltage line when the second transistor is in an on state,
a voltage of the control electrode of the third transistor is boosted by a voltage of the second synchronous pulse changing from a low level to a high level,
the fourth transistor connects the control electrode of the third transistor and a constant voltage line when the fourth transistor is in an on state, and
the first stage outputs a signal for switching the fourth transistor to an off state.
6. A driving circuit according to claim 5 ,
wherein the first transistor outputs a scanning signal to the scanning line and the fourth transistor outputs a scanning signal to the scanning line.