IP Library Patent Application 13724903
Patent Application
App. No. 13/724,903

COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
13/724,903
Abstract

An embodiment of a compound semiconductor device includes: a substrate; an electron transport layer formed over the substrate; an electron supply layer formed over the electron transport layer; a source electrode and a drain electrode formed over the electron supply layer; a gate electrode formed over the electron supply layer between the source electrode and the drain electrode; a p-type compound semiconductor layer formed between the electron supply layer and the gate electrode; and a compound semiconductor layer containing an n-type impurity formed between the electron supply layer and the p-type compound semiconductor layer.

Claims (53)

1 . A compound semiconductor device comprising;

a substrate;

an electron transport layer formed over the substrate;

an electron supply layer formed over the electron transport layer;

a source electrode and a drain electrode formed over the electron supply layer;

a gate electrode formed over the electron supply layer between the source electrode and the drain electrode;

a p-type compound semiconductor layer formed between the electron supply layer and the gate electrode; and

a compound semiconductor layer containing an n-type impurity formed between the electron supply layer and the p-type compound semiconductor layer.

2 . The compound semiconductor device according to claim 1 , wherein the compound semiconductor layer containing an n-type impurity further contains a p-type impurity.

3 . The compound semiconductor device according to claim 1 , wherein the compound semiconductor layer containing an n-type impurity is a GaN layer.

4 . The compound semiconductor device according to claim 1 , wherein the compound semiconductor layer containing an n-type impurity extends up to the source electrode and the drain electrode.

5 . The compound semiconductor device according to claim 1 , wherein the p-type compound semiconductor layer is an Al x Ga 1-x N layer (0≦x<1).

6 . The compound semiconductor device according to claim 1 , further comprising:

an AlN layer formed between the electron supply layer and the compound semiconductor layer containing an n-type impurity; and

an n-type compound semiconductor layer formed between the electron supply layer and the AlN layer.

7 . The compound semiconductor device according to claim 6 , wherein the n-type compound semiconductor layer is a GaN layer.

8 . The compound semiconductor device according to claim 1 , wherein each of the electron transport layer and the electron supply layer contains a GaN-based material.

9 . A power supply apparatus, comprising

a compound semiconductor device, which comprises:

a substrate;

an electron transport layer formed over the substrate;

an electron supply layer formed over the electron transport layer;

a source electrode and a drain electrode formed over the electron supply layer;

a gate electrode formed over the electron supply layer between the source electrode and the drain electrode;

a p-type compound semiconductor layer formed between the electron supply layer and the gate electrode; and

a compound semiconductor layer containing an n-type impurity formed between the electron supply layer and the p-type compound semiconductor layer.

10 . An amplifier, comprising

a compound semiconductor device, which comprises:

a substrate;

an electron transport layer formed over the substrate;

an electron supply layer formed over the electron transport layer;

a source electrode and a drain electrode formed over the electron supply layer;

a gate electrode formed over the electron supply layer between the source electrode and the drain electrode;

a p-type compound semiconductor layer formed between the electron supply layer and the gate electrode; and

a compound semiconductor layer containing an n-type impurity formed between the electron supply layer and the p-type compound semiconductor layer.

11 . A method of manufacturing a compound semiconductor device, comprising:

forming an electron transport layer over a substrate;

forming an electron supply layer over the electron transport layer;

forming a compound semiconductor layer containing an n-type impurity over the electron supply layer;

forming a p-type compound semiconductor layer over the compound semiconductor layer containing an n-type impurity;

etching the p-type compound semiconductor layer so as to remain a part of the p-type compound semiconductor layer;

annealing so as to activate a p-type impurity in the p-type compound semiconductor layer;

forming a source electrode and a drain electrode over the electron supply layer so that the remaining part of the p-type compound semiconductor layer is between the source electrode and the drain electrode; and

forming a gate electrode over the remaining part of the p-type compound semiconductor layer.

12 . The method of manufacturing a compound semiconductor device according to claim 11 , wherein the p-type impurity in the p-type compound semiconductor layer diffuses into the compound semiconductor layer containing an n-type impurity during the annealing.

13 . The method of manufacturing a compound semiconductor device according to claim 11 , wherein the compound semiconductor layer containing an n-type impurity is a GaN layer.

14 . The method of manufacturing a compound semiconductor device according to claim 11 , wherein the p-type compound semiconductor layer is an Al x Ga 1-x N layer (0≦x<1).

15 . The method of manufacturing a compound semiconductor device according to claim 11 , further comprising, before the forming the compound semiconductor layer containing an n-type impurity:

forming an n-type compound semiconductor layer over the electron supply layer; and

forming an AlN layer over the n-type compound semiconductor layer.

16 . The method of manufacturing a compound semiconductor device according to claim 15 , wherein the n-type compound semiconductor layer is a GaN layer.

17 . The method of manufacturing a compound semiconductor device according to claim 11 , wherein each of the electron transport layer and the electron supply layer contains a GaN-based material.

18 . The method of manufacturing a compound semiconductor device according to claim 11 , wherein the annealing is performed after the etching.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: FUJITSU LIMITED
To: TRANSPHORM JAPAN, INC.
Reel/Frame 032865/0196 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2013
From: NISHIMORI, MASATO; KIKKAWA, TOSHIHIDE; IMADA, TADAHIRO
To: FUJITSU LIMITED
Reel/Frame 029962/0108 →