IP Library Granted Patent US 8,806,247
Granted Patent B2
US 8,806,247 · App. 13/725,901 · Granted Aug 12, 2014

Adaptive power control

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Quick Facts
Patent No.
US 8,806,247
App. No.
13/725,901
Granted
Aug 12, 2014
Kind
B2
Abstract

A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted.

Claims (54)

1. A method, comprising:

determining a level of permitted power consumption by a processing device from a set of operating conditions of the processing device, with the determining the level of permitted power consumption not based upon instructions to be executed by the processing device;

determining a highest allowable frequency of operation of the processing device that would result in power consumption not exceeding the level of permitted power consumption;

determining a lowest allowable level of voltage to apply to the processing device that would allow execution of the instructions by the processing device at the highest allowable frequency; and

changing power consumption of the processing device during execution of the instructions by reducing a magnitude of a difference between an operating frequency of the processing device and the highest allowable frequency of operation of the processing device and reducing a magnitude of a difference between a voltage applied to the processing device and the lowest allowable level of voltage.

2. The method as recited in claim 1 , further comprising:

controlling a frequency generator, using the processing device, to provide the operating frequency to the processing device.

3. The method as recited in claim 2 , further comprising:

supplying a clock signal to the frequency generator using a clock generator.

4. The method as recited in claim 3 , wherein:

the processing device and the frequency generator are included in an integrated circuit with the clock generator external to the integrated circuit.

5. The method as recited in claim 4 , further comprising:

controlling a programmable voltage supply, using the processing device, to provide the voltage applied to the processing device, with the voltage source external to the integrated circuit.

6. The method as recited in claim 1 , further comprising:

controlling a voltage source, using the processing device, to provide the voltage applied to the processing device.

7. The method as recited in claim 1 , wherein:

the magnitude of the difference between the operating frequency of the processing device and the highest allowable frequency of operation of the processing device is reduced before reducing the magnitude of the difference between the voltage applied to the processing device and the lowest allowable level of voltage.

8. The method as recited in claim 1 , wherein:

the reducing the magnitude of the difference between the voltage applied to the processing device and the lowest allowable level of the voltage includes changing the voltage applied in a plurality of decrements after the magnitude of the difference between the operating frequency of the processing device and the highest allowable frequency of operation of the processing device is reduced.

9. The method as recited in claim 1 , wherein:

the operating conditions include at least one of a temperature of the processing device, the voltage applied to the processing device, or the operating frequency of the processing device.

10. A method comprising

using a processing device, monitoring operating parameters of the processing device operating at a first voltage and a first frequency;

using the processing device and the operating parameters, determining a second frequency, less than the first frequency, for operation of the processing device, with the determining the second frequency not based upon instructions to be executed by the processing device;

using the processing device and the operating parameters, determining a second voltage, having a magnitude less than a magnitude of the first voltage, for operation of the processing device, with the determining the second voltage not based upon instructions to be executed by the processing device;

using the processing device, controlling a frequency generator to change a first clock signal supplied to the processing device from the first frequency to the second frequency; and

using the processing device, controlling a voltage source to change a voltage supplied to the processing device from the first voltage to the second voltage while the processing device executes the instructions.

11. The method as recited in claim 10 , wherein:

the change of the first clock signal from the first frequency to the second frequency occurs prior to changing the first voltage to the second voltage.

12. The method as recited in claim 10 , wherein:

the change of the first voltage to the second voltage includes changing the voltage supplied to the processing device in a plurality of decrements after the change of the first clock signal from the first frequency to the second frequency.

13. The method as recited in claim 10 , wherein:

the operating parameters include at least one of a temperature of the processing device, the first voltage, or the first frequency.

14. The method as recited in claim 10 , further comprising:

supplying a second clock signal to the frequency generator using a clock generator.

15. The method as recited in claim 14 , wherein:

the processing device and the frequency generator are included in an integrated circuit with the clock generator external to the integrated circuit.

16. The method as recited in claim 15 , wherein:

the voltage source includes a programmable voltage supply external to the integrated circuit.

17. An apparatus, comprising:

a frequency generator configured to generate a first clock signal at a first frequency; and

a processing device configured to receive the first clock signal and a first voltage provided by a voltage source, the processing device operable to monitor operating parameters of the processing device, the processing device operable to determine a second frequency of the first clock signal and a second voltage for operation of the processing device at lower power than operation at the first frequency and the first voltage, with the processing device operable to determine the second frequency and the second voltage not based on instructions to be executed by the processing device, the processing device operable to control the frequency generator to change from generating the first clock signal at the first frequency to generating the first clock signal at a second frequency, and the processing device operable to control the voltage source to change from providing the first voltage to providing the second voltage during execution of the instructions by the processing device.

18. The apparatus as recited in claim 17 , wherein:

the processing device is operable to control the change of the first clock signal from the first frequency to the second frequency occurs prior to changing the first voltage to the second voltage.

19. The apparatus as recited in claim 17 , wherein:

the processing device is operable to control the change of the first voltage to the second voltage in a plurality of decrements after the change of the first clock signal from the first frequency to the second frequency.

20. The apparatus as recited in claim 17 , wherein:

the operating parameters include at least one of a temperature of the processing device, the first voltage, or the first frequency.

21. The apparatus as recited in claim 17 , wherein:

the frequency generator is configured to receive a second clock signal provided by a clock generator.

22. The apparatus as recited in claim 21 , wherein:

the processing device and the frequency generator are included in an integrated circuit with the clock generator external to the integrated circuit.

23. The apparatus as recited in claim 22 , wherein:

the voltage source includes a programmable voltage supply external to the integrated circuit.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2015
From: INTELLECTUAL VENTURES ASSETS 16 LLC
To: QUEST PATENT RESEARCH CORPORATION
Reel/Frame 037098/0680 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2015
From: QUEST PATENT RESEARCH CORPORATION
To: SEMCON IP INC.
Reel/Frame 037101/0965 →
ASSIGNMENT EFFECTIVE AS OF JULY 1, 2015. Recorded Oct 9, 2015
From: INTELLECTUAL VENTURES HOLDING 81 LLC
To: INTELLECTUAL VENTURES ASSETS 16 LLC
Reel/Frame 036828/0253 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 036711 FRAME: 0160. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 6, 2015
From: INTELLECTUAL VENTURES FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036797/0356 →
MERGER Recorded Sep 29, 2015
From: INTELLECTUAL VENTURE FUNDING LLC
To: INTELLECTUAL VENTURES HOLDING 81 LLC
Reel/Frame 036711/0160 →
MERGER Recorded Aug 12, 2015
From: TRANSMETA CORPORATION, A CALIFORNIA CORPORATION
To: TRANSMETA CORPORATION, A DELAWARE CORPORATION
Reel/Frame 036313/0384 →
MERGER Recorded Aug 12, 2015
From: TRANSMETA CORPORATION
To: TRANSMETA LLC
Reel/Frame 036313/0406 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2015
From: TRANSMETA LLC
To: INTELLECTUAL VENTURE FUNDING LLC
Reel/Frame 036338/0040 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2015
From: HALEPETE, SAMEER; ANVIN, H PETER; CHEN, ZONGJIAN; D'SOUZA, GODFREY P; FLEISCHMANN, MARC; KLAYMAN, KEITH; LAWRENCE, THOMAS; READ, ANDREW
To: TRANSMETA CORPORATION
Reel/Frame 036313/0309 →