IP Library › Granted Patent US 8,815,695
Granted Patent B2
US 8,815,695 · App. 13/727,898 · Granted Aug 26, 2014

Methods to improve leakage for ZrO2 based high K MIM capacitor

Inventors: Xiangxin Rui (Campbell, CA); Mitsuhiro Horikawa (Higashihiroshima, JP); Hiroyuki Ode (Higashihiroshima, JP); Karthik Ramani (Santa Clara, CA)
Assignees: Intermolecular, Inc.; Elpida Memory, Inc.
H01L28/40
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Quick Facts
Patent No.
US 8,815,695
App. No.
13/727,898
Granted
Aug 26, 2014
Kind
B2
Abstract

A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive base layer and conductive metal oxide layer. A second electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the second electrode layer contains a conductive base layer and conductive metal oxide layer. In some embodiments, both the first electrode layer and the second electrode layer contain a conductive base layer and conductive metal oxide layer.

Claims (31)

1. A method for forming a capacitor stack, the method comprising:

forming a first electrode layer above a substrate;

forming a first blocking layer on the first electrode layer,

wherein the first blocking layer comprises a first metal oxide,

wherein the first blocking layer has a thickness between 1 A and 15 A, and

wherein the first metal oxide is less than 30% crystalline and has a resistivity greater than 0.01 ohm-cm;

forming a dielectric layer above the first blocking layer,

wherein the dielectric layer is substantially all crystalline;

forming a second blocking layer on the dielectric layer,

wherein the second blocking layer comprises a second metal oxide,

wherein the second blocking layer has a thickness between 1 A and 15 A, and

wherein the second metal oxide is less than 30% crystalline and has a resistivity greater than 0.01 ohm-cm; and

forming a second electrode layer above the dielectric layer.

2. The method of claim 1 , wherein the first electrode layer comprises one of ruthenium, platinum, titanium nitride, tantalum nitride, titanium-aluminum-nitride, tungsten, tungsten nitride, molybdenum, molybdenum nitride, or vanadium nitride.

3. The method of claim 1 , wherein the first metal oxide comprises one of molybdenum oxide, tungsten oxide, ruthenium oxide, iridium oxide, chromium oxide, manganese oxide, cerium oxide, europium oxide, or tin oxide.

4. The method of claim 3 , wherein the first metal oxide comprises molybdenum oxide.

5. The method of claim 1 , wherein the dielectric layer comprises one of aluminum oxide, barium-strontium-titanate (BST), hafnium oxide, hafnium silicate, niobium oxide, lead-zirconium-titanate (PZT), a bilayer of silicon oxide and silicon nitride, silicon oxy-nitride, strontium-titanate (STO), tantalum oxide, titanium oxide, zirconium oxide or doped versions of the same.

6. The method of claim 5 , wherein the dielectric layer comprises zirconium oxide or a doped version of the same.

7. The method of claim 6 , wherein the dielectric layer further comprises a dopant comprising at least one of Al, Ce, Co, Er, Ga, Gd, Ge, Hf, In, La, Lu, Mg, Mn, Nd, Pr, Sc, Si, Sn, Sr, Y, or Zr.

8. The method of claim 1 , further comprising annealing the first electrode layer, wherein the first electrode layer is annealed before the forming of the dielectric layer.

9. The method of claim 8 , wherein the first electrode layer is annealed in a reducing atmosphere comprising between about 0% and about 10% H 2 in N 2 or other inert gases at a temperature between about 400 C and about 650 C for between 1 millisecond and about 60 minutes.

10. The method of claim 1 , further comprising annealing the first electrode layer and the dielectric layer, wherein the first electrode layer and the dielectric layer are annealed before the forming of the second electrode layer.

11. The method of claim 10 , wherein the first electrode layer and the dielectric layer are annealed in an oxidizing atmosphere comprising between 0% O 2 to 100% O 2 in N 2 and at temperatures between 300 C to 600 C for between 1 millisecond to 60 minutes.

12. The method of claim 11 , wherein the oxidizing atmosphere comprises between 0% O 2 to 25% O 2 in N 2 .

13. The method of claim 1 , wherein the second electrode layer comprises one of ruthenium, platinum, titanium nitride, tantalum nitride, titanium-aluminum-nitride, tungsten, tungsten nitride, molybdenum, molybdenum nitride, or vanadium nitride.

14. The method of claim 13 , wherein the second electrode layer comprises titanium nitride.

15. The method of claim 1 , wherein the second metal oxide comprises one of molybdenum oxide, tungsten oxide, ruthenium oxide, iridium oxide, chromium oxide, manganese oxide, cerium oxide, europium oxide, or tin oxide.

16. The method of claim 15 , wherein the second metal oxide comprises molybdenum oxide.

17. The method of claim 15 , wherein the second metal oxide comprises cerium oxide.

18. The method of claim 1 , further comprising annealing the first electrode layer, the dielectric layer, and the second electrode layer in an oxidizing environment after the forming of the second electrode.

19. The method of claim 18 , wherein the oxidizing environment comprises between 0% O 2 to 25% O 2 and at temperatures between 300 C to 600 C for between 1 millisecond to 60 minutes.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE. AN ASSIGNEE NEEDS TO BE ADDED. PREVIOUSLY RECORDED ON REEL 029532 FRAME 0605. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT TO RE-RECORD ASSIGNMENT TO CORRECT THE ASSIGNEE BY ADDING ELPIDA MEMORY, INC.. Recorded Apr 14, 2014
From: RUI, XIANGXIN; HORIKAWA, MITSUHIRO
To: INTERMOLECULAR, INC.; ELPIDA MEMORY, INC.
Reel/Frame 032736/0266 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2013
From: ODE, HIROYUKI; RAMANI, KARTHIK
To: INTERMOLECULAR, INC.; ELPIDA MEMORY, INC.
Reel/Frame 031682/0701 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2012
From: RUI, XIANGXIN; HORIKAWA, MITSUHIRO
To: INTERMOLECULAR, INC.
Reel/Frame 029532/0605 →
Continuity (1)
Related Publication 20140187015A1 · Jul 3, 2014