COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
An embodiment of a compound semiconductor device includes: an electron transit layer; an electron supply layer formed over the electron transit layer; a two-dimensional electron gas suppressing layer formed over the electron supply layer; an insulating film formed over the two-dimensional electron gas suppressing layer and the electron transit layer; and a gate electrode formed over the insulating film. The gate electrode is electrically connected with the two-dimensional electron gas suppressing layer.
1 . A compound semiconductor device comprising:
an electron transit layer;
an electron supply layer formed over the electron transit layer;
a two-dimensional electron gas suppressing layer formed over the electron supply layer;
an insulating film formed over the two-dimensional electron gas suppressing layer and the electron transit layer; and
a gate electrode formed over the insulating film,
wherein the gate electrode is electrically connected with the two-dimensional electron gas suppressing layer.
2 . The compound semiconductor device according to claim 1 , further comprising a source electrode and a drain electrode formed over the electron supply layer, the source electrode and the drain electrode sandwiching the two-dimensional electron gas suppressing layer in planar view,
wherein the gate electrode is electrically connected with the two-dimensional electron gas suppressing layer at a contact surface on the source electrode side of a portion located above the insulating film.
3 . The compound semiconductor device according to claim 1 , wherein
the electron transit layer is a GaN layer,
the electron supply layer is AlGaN layer, and
the two-dimensional electron gas suppressing layer is a p-type GaN layer.
4 . The compound semiconductor device according to claim 3 , wherein
a thickness of the AlGaN layer is 5 nm or more and 40 nm or less, and
an Al fraction of the AlGaN layer is 15% or more and less than 40%.
5 . The compound semiconductor device according to claim 2 , further comprising a field plate located between the gate electrode and the drain electrode, and electrically connected with the source electrode.
6 . The compound semiconductor device according to claim 5 , wherein a distance between the field plate and the electron supply layer in a thickness direction is shorter than a distance between the portion located above the insulating film and the two-dimensional electron gas suppressing layer in the thickness direction.
7 . The compound semiconductor device according to claim 5 , wherein a recess is formed at a surface of the electron supply layer beneath the field plate.
8 . The compound semiconductor device according to claim 2 , wherein the gate electrode covers whole of the two-dimensional electron gas suppressing layer between the source electrode and the drain electrode.
9 . The compound semiconductor device according to claim 1 , wherein a thickness of the insulating film is 20 nm or more and 500 nm or less.
10 . A power supply apparatus comprising
a compound semiconductor device, which comprises:
an electron transit layer;
an electron supply layer formed over the electron transit layer;
a two-dimensional electron gas suppressing layer formed over the electron supply layer;
an insulating film formed over the two-dimensional electron gas suppressing layer and the electron transit layer; and
a gate electrode formed over the insulating film,
wherein the gate electrode is electrically connected with the two-dimensional electron gas suppressing layer.
11 . An amplifier comprising
a compound semiconductor device, which comprises:
an electron transit layer;
an electron supply layer formed over the electron transit layer;
a two-dimensional electron gas suppressing layer formed over the electron supply layer;
an insulating film formed over the two-dimensional electron gas suppressing layer and the electron transit layer; and
a gate electrode formed over the insulating film,
wherein the gate electrode is electrically connected with the two-dimensional electron gas suppressing layer.
12 . A method of manufacturing a compound semiconductor device, comprising:
forming an electron supply layer over an electron transit layer;
forming a two-dimensional electron gas suppressing layer over the electron supply layer;
forming an insulating film over the two-dimensional electron gas suppressing layer and the electron transit layer; and
forming a gate electrode over the insulating film,
wherein the gate electrode is electrically connected with the two-dimensional electron gas suppressing layer.
13 . The method of manufacturing a compound semiconductor device according to claim 12 , further comprising forming a source electrode and a drain electrode over the electron supply layer, the source electrode and the drain electrode sandwiching the two-dimensional electron gas suppressing layer in planar view,
wherein the gate electrode is electrically connected with the two-dimensional electron gas suppressing layer on the source electrode side of a portion of the gate electrode, the portion being located above the insulating film.
14 . The method of manufacturing a compound semiconductor device according to claim 13 , wherein the forming the gate electrode comprises:
forming an opening in the insulating film through which a part of the two-dimensional electron gas suppressing layer is exposed;
forming a conductive film in contact with the two-dimensional electron gas suppressing layer through the opening; and
patterning the conductive film so that the portion being located above the insulating film is on the drain electrode side of a surface at which the conductive film is in contact with the two-dimensional electron gas suppressing layer.
15 . The method of manufacturing a compound semiconductor device according to claim 12 , wherein
the electron transit layer is a GaN layer,
the electron supply layer is AlGaN layer, and
the two-dimensional electron gas suppressing layer is a p-type GaN layer.
16 . The method of manufacturing a compound semiconductor device according to claim 15 , wherein a thickness of the AlGaN layer is 5 nm or more and 40 nm or less, and
an Al fraction of the AlGaN layer is 15% or more and less than 40%.
17 . The method of manufacturing a compound semiconductor device according to claim 13 , further comprising forming a field plate between the gate electrode and the drain electrode in planar view, the field plate being electrically connected with the source electrode.
18 . The method of manufacturing a compound semiconductor device according to claim 17 , wherein a distance between the field plate and the electron supply layer in a thickness direction is shorter than a distance between the portion and the two-dimensional electron gas suppressing layer in the thickness direction.
19 . The method of manufacturing a compound semiconductor device according to claim 18 , further comprising, before the forming the field plate:
forming a second opening in the insulating film; and
forming a second insulating film thinner than the insulating film in the second opening,
wherein the field plate is formed over the second insulating film.
20 . The method of manufacturing a compound semiconductor device according to claim 19 , further comprising, between the forming the second opening and the forming the second insulating film, forming a recess at a surface of the electron supply layer which is exposed through the second opening.
21 . The method of manufacturing a compound semiconductor device according to claim 13 , wherein the gate electrode is formed so as to cover whole of the two-dimensional electron gas suppressing layer between the source electrode and the drain electrode.
22 . The method of manufacturing a compound semiconductor device according to claim 12 , wherein a thickness of the insulating film is 20 nm or more and 500 nm or less.