SEMICONDUCTOR ASSEMBLY WITH BUILT-IN STOPPER, SEMICONDUCTOR DEVICE AND BUILD-UP CIRCUITRY AND METHOD OF MAKING THE SAME
The present invention relates to a semiconductor assembly with a built-in stopper and a method of making the same. In accordance with one preferred embodiment of the present invention, the method includes: forming a stopper on a dielectric layer; mounting a semiconductor device on the dielectric layer using the stopper as a placement guide for the semiconductor device; attaching a stiffener to the dielectric layer; and forming a build-up circuitry that covers the semiconductor device, the stopper and the stiffener and provides signal routing for the semiconductor device. Accordingly, the stopper can accurately confine the placement location of the semiconductor device and avoid the electrical connection failure between the semiconductor device and the build-up circuitry.
1 . A method of making a semiconductor assembly with a built-in stopper, comprising:
forming a stopper on a dielectric layer;
mounting a semiconductor device on the dielectric layer using the stopper as a placement guide for the semiconductor device that includes an active surface with a contact pad thereon and an inactive surface, wherein the active surface faces a first vertical direction, the inactive surface faces a second vertical direction opposite the first vertical direction, and the stopper is located in close proximity to and laterally aligned with and laterally extends beyond peripheral edges of the semiconductor device in lateral directions orthogonal to the vertical directions;
attaching a stiffener to the dielectric layer, including aligning the semiconductor device and the stopper within an aperture of the stiffener; and
forming a build-up circuitry that covers the stopper, the semiconductor device and the stiffener in the first vertical direction and includes a first conductive via that directly contacts the contact pad of the semiconductor device to provide an electrical connection between the semiconductor device and the build-up circuitry.
2 . The method of claim 1 , wherein the electrical connection between the semiconductor device and the build-up circuitry is devoid of solder.
3 . The method of claim 1 , wherein forming the stopper on the dielectric layer includes:
providing a laminate substrate that includes a metal layer and the dielectric layer; and then
removing a selected portion of the metal layer to form the stopper.
4 . The method of claim 1 , forming the stopper on the dielectric layer includes:
providing a laminate substrate that includes a metal layer and the dielectric layer; then
removing a selected portion of the metal layer to form a recessed portion; then
depositing a plastic material into the recessed portion; and then removing a remaining portion of the metal layer.
5 . The method of claim 1 , wherein the semiconductor device is mounted on the dielectric layer with the active surface facing the dielectric layer and the stopper extends from the dielectric layer in the second vertical direction.
6 . The method of claim 5 , wherein the semiconductor device is attached to the dielectric layer using an adhesive that contacts and is sandwiched between the semiconductor device and the dielectric layer.
7 . The method of claim 6 , wherein the adhesive contacts and is coplanar with the stopper in the first vertical direction and is lower than the stopper in the second vertical direction.
8 . The method of claim 5 , wherein forming the build-up circuitry includes:
providing a first insulating layer that includes the dielectric layer and covers the stopper, the semiconductor device and the stiffener in the first vertical direction; then
forming a first via opening that extends through the first insulating layer and is aligned with the contact pad of the semiconductor device; and then
forming a first conductive trace that extends from the first insulating layer in the first vertical direction and extends laterally on the first insulating layer and extends through the first via opening in the second vertical direction to form the first conductive via in direct contact with the contact pad of the semiconductor device.
9 . The method of claim 8 , wherein forming the build-up circuitry includes:
forming an additional first via opening that extends through the first insulating layer and is aligned with the stiffener; and then
forming the first conductive trace that extends through the additional first via opening in the second vertical direction to form an additional first conductive via in direct contact with the stiffener.
10 . The method of claim 1 , wherein the semiconductor device is mounted on the dielectric layer with the inactive surface facing the dielectric layer and the stopper extends from the dielectric layer in the first vertical direction.
11 . The method of claim 10 , the semiconductor device is attached to the dielectric layer using an adhesive that contacts and is sandwiched between the semiconductor device and the dielectric layer.
12 . The method of claim 11 , wherein the adhesive contacts and is coplanar with the stopper in the second vertical direction and is lower than the stopper in the first vertical direction.
13 . The method of claim 10 , wherein forming the build-up circuitry includes:
providing a first insulating layer that covers the stopper, the semiconductor device and the stiffener in the first vertical direction; then
forming a first via opening that extends through the first insulating layer and is aligned with the contact pad of the semiconductor device; and then
forming a first conductive trace that extends from the first insulating layer in the first vertical direction and extends laterally on the first insulating layer and extends through the first via opening in the second vertical direction to form the first conductive via in direct contact with the contact pad of the semiconductor device.
14 . The method of claim 13 , wherein forming the build-up circuitry includes:
forming an additional first via opening in the first insulating layer that is aligned with the stiffener; and then
forming the first conductive trace that extends through the additional first via opening in the second vertical direction to form an additional first conductive via in direct contact with the stiffener.
15 . The method of claim 1 , wherein the stopper include a continuous or discontinuous strip or an array of posts.
16 . The method of claim 1 , wherein a gap in between the semiconductor device and the stopper is in a range of 0.001 to 1 mm.
17 . The method of claim 1 , wherein the stopper has a height in a range of 10 to 200 microns.
18 . The method of claim 1 , wherein the stiffener is a laminated epoxy or polyimide.
19 . A semiconductor assembly with a built-in stopper, comprising:
a semiconductor device that includes an active surface with a contact pad thereon and an inactive surface, wherein the active surface faces a first vertical direction and the inactive surface faces a second vertical direction opposite the first vertical direction;
the stopper that serves as a placement guide for the semiconductor device and is in close proximity to and laterally aligned with and laterally extends beyond peripheral edges of the semiconductor device in lateral directions orthogonal to the vertical directions;
a stiffener that includes an aperture with the semiconductor device and the stopper extending thereinto; and
a build-up circuitry that covers the stopper, the semiconductor device and the stiffener in the first vertical direction and includes a first insulating layer, a first via opening and a first conductive trace, wherein the first via opening in the first insulating layer is aligned with the contact pad of the semiconductor device, and the first conductive trace extends from the first insulating layer in the first vertical direction and extends through the first via opening in the second vertical direction and directly contacts the contact pad.
20 . A method of making a semiconductor assembly with a built-in stopper, comprising:
forming a stopper on a dielectric layer;
mounting a semiconductor device on the dielectric layer using the stopper as a placement guide for the semiconductor device that includes an active surface with a contact pad thereon and an inactive surface, wherein the active surface faces a first vertical direction and is attached to the dielectric layer, the inactive surface faces a second vertical direction opposite the first vertical direction, and the stopper is located in close proximity to and laterally aligned with and laterally extends beyond peripheral edges of the semiconductor device in lateral directions orthogonal to the vertical directions;
depositing an encapsulant that covers the semiconductor device, the stopper and the dielectric layer from the second vertical direction and extends laterally from the semiconductor device and the stopper to peripheral edges of the assembly; and
forming a build-up circuitry that covers the stopper, the semiconductor device and the stiffener in the first vertical direction and includes a first conductive via that extends through the dielectric layer and directly contacts the contact pad of the semiconductor device to provide an electrical connection between the semiconductor device and the build-up circuitry.