Semiconductor device
View Patent ↗This semiconductor device according to the present invention includes a plurality of cylindrical lower electrodes aligned densely in a memory array region; a plate-like support which is contacted on the side surface of the cylindrical lower electrodes, and links to support the plurality of the cylindrical lower electrodes; a pore portion provided in the plate-like support; a dielectric film covering the entire surface of the cylindrical lower electrodes and the plate-like support in which the pore portion is formed; and an upper electrode formed on the surface of the dielectric film, wherein the boundary length of the part on the side surface of the cylindrical lower electrode which is exposed on the pore portion is shorter than the boundary length of the part on the side surface of the cylindrical lower electrode which is not exposed on the pore portion.
1. A semiconductor device comprising a plurality of capacitors, each of the capacitors comprising:
a cylindrical lower electrode having a top open edge, the cylindrical lower electrode being formed over a substrate,
an upper electrode,
a dielectric film between the cylindrical lower electrode and the upper electrode,
a plate support extending over the substrate in a plate shape, the plate support being contacted on a side surface of the cylindrical lower electrodes at a contacting portion, and links to support the cylindrical lower electrodes, and
a pore portion provided in the plate support in a location separate from where the cylindrical lower electrode is disposed in plane view, a part of an outer circumference of the cylindrical lower electrodes being in contact with the pore portion of the plate support in plane view,
wherein a topmost open edge of the cylindrical lower electrode is located at an upper position at a top surface of the plate support, and the cylindrical lower electrode has an extending cylindrical portion above a top surface of the plate support.
2. The semiconductor device according to claim 1 , wherein same plate support directly links at least more than three cylindrical lower electrodes.
3. The semiconductor device according to claim 1 , wherein the pore portion is selectively formed in the plate support in a hole shape, a remaining part of the cylindrical lower electrode is in contact with the plate support in plane view.
4. The semiconductor device according to claim 3 ,
wherein a plurality of pore portions are arranged in a row at a first pitch extending in a first direction, the row being arranged repeatedly in a second pitch in a second direction.
5. The semiconductor device according to claim 4 ,
wherein neighboring rows are shifted by a predetermined distance.
6. The semiconductor device according to claim 4 ,
wherein neighboring rows are shifted by a half of the first pitch.
7. The semiconductor device according to claim 1 , wherein a top surface of the plate support is located at lower position than a topmost edge of the cylindrical lower electrode and a lower surface of the plate support is located at a position upwards of a lowest portion of the cylindrical lower electrode.
8. The semiconductor device according to claim 1 ,
wherein a circular or an ellipsoidal pore portion is formed in the plate support.
9. The semiconductor device according to claim 1 , wherein a total area of the pore portion provided in the plate support is smaller than a total area of the plate support separate from the pore portion.
10. A semiconductor device comprising:
a substrate;
a first electrode formed over the substrate, the first electrode comprising a cylindrical conductor;
a plate support extending over the substrate in a plate shape, and having a pore portion in a location separate from where the cylindrical conductor is disposed in plane view, a first portion of an outer circumference of the cylindrical conductor being in contact with the plate support in plane view, a second portion of the outer circumference of the cylindrical conductor being in contact with the pore portion in plane view, a top end of the second portion of the cylindrical conductor in plane view being located at an upper position at a top surface of the plate support;
a dielectric film covering a surface of the first electrode; and
a second electrode covering the dielectric film.
11. The semiconductor device according to claim 10 , wherein the first electrode is a lower electrode, and at least more than three cylindrical lower electrodes are linked to a common plate support.
12. The semiconductor device according to claim 10 , wherein the pore portion is selectively formed in the plate support in a hole shape, the plate support including a side surface defining the pore portion.
13. The semiconductor device according to claim 12 ,
wherein a plurality of pore portions are arranged in a row at a first pitch extending in a first direction, the row being arranged repeatedly in a second pitch in a second direction.
14. The semiconductor device according to claim 13 ,
wherein neighboring rows are shifted by a predetermined distance.
15. The semiconductor device according to claim 10 , wherein a top open edge of the cylindrical conductor is located at an upper position at the top surface of the plate support.
16. The semiconductor device according to claim 10 ,
wherein a circular or an ellipsoidal pore portion is formed in the plate support.
17. A semiconductor device comprising:
a substrate;
a cylindrical lower electrode formed over the substrate, the cylindrical lower electrode having a sidewall portion and a bottom portion, the sidewall portion comprising a first sidewall portion and a second sidewall portion, the first sidewall portion having a first top open edge, the second sidewall portion having a second top open edge;
a dielectric film covering the cylindrical lower electrode;
an upper electrode covering the dielectric film; and
a plate support extending over the substrate in a plate shape, and having a pore portion in a location separate from where the cylindrical lower conductor is disposed in plane view, a part of the first sidewall portion of the cylindrical lower electrode being in contact with the plate support in plane view, an outer circumference of the second sidewall portion of the cylindrical electrode being in contact with the pore portion in plane view,
wherein the second top open edge of the second sidewall portion being located at an upper position than a top surface of the plate support.
18. The semiconductor device according to claim 17 , wherein a same plate support directly links at least more than three cylindrical lower electrodes.
19. The semiconductor device according to claim 17 , wherein a pore portion is selectively formed in the plate support in a hole shape, the plate support including a side surface defining the pore portion.
20. The semiconductor device according to claim 19 ,
wherein a plurality of pore portions are arranged in a row at a first pitch extending in a first direction, the row being arranged repeatedly in a second pitch in a second direction.
21. The semiconductor device according to claim 20 ,
wherein neighboring rows are shifted by a predetermined distance.