Doped and strained flexible thin-film transistors
Semiconductor trilayer structures that are doped and strained are provided. Also provided are mechanically flexible transistors, including radiofrequency transistors, incorporating the trilayer structures and methods for fabricating the trilayer structures and transistors. The trilayer structures comprise a first layer of single-crystalline semiconductor material, a second layer of single-crystalline semiconductor material and a third layer of single-crystalline semiconductor material. In the structures, the second layer is in contact with and sandwiched between the first and third layers and the first layer is selectively doped to provide one or more doped regions in the layer.
1. A transistor comprising:
a doped and strained trilayer structure comprising:
a first layer of single-crystalline semiconductor material, wherein the first layer comprises one or more doped regions extending through the first layer and the one or more doped regions define a source region, a drain region and a gate region in the first layer;
a second layer of single-crystalline semiconductor material; and
a third layer of single-crystalline semiconductor material;
wherein the second layer is in contact with and sandwiched between the first and third layers, wherein the semiconductor material of the first and third layers is the same material and the thicknesses of the first and third layers are substantially equal, and further wherein the trilayer structure is not attached to a substrate with which it has an epitaxial relationship, such that the trilayered structure has self-sustained strain that is shared between the three layers, and further wherein the trilayer structure has a flat topology;
a mechanically flexible substrate structure disposed below and in contact with the third layer of single-crystalline semiconductor material, wherein the substrate structure and the third layer of single-crystalline semiconductor material do not have an epitaxial relationship;
a gate dielectric disposed on the gate region in the first layer of single-crystalline semiconductor material;
a gate contact disposed over the gate dielectric;
a source contact in electrical communication with the source region in the first layer of single-crystalline semiconductor material; and
a drain contact in electrical communication with the drain region in the first layer of single-crystalline semiconductor material.
2. The transistor of claim 1 , wherein the transistor is a radiofrequency transistor.
3. The transistor of claim 1 , wherein the mechanically flexible substrate comprises a layer of plastic material.
4. The transistor of claim 1 , wherein the first and third layers of single-crystalline semiconductor material are layers of single-crystalline silicon and the second layer of single-crystalline semiconductor material is a layer of single crystalline silicon SiGe alloy.
5. The transistor of claim 4 , wherein the transistor is a radiofrequency transistor.
6. The transistor of claim 1 , wherein the first and third layers of single-crystalline semiconductor material are layers of single-crystalline SiGe alloy and the second layer of single-crystalline semiconductor material is a layer of single-crystalline silicon.
7. The transistor of claim 6 , wherein the transistor is a radiofrequency transistor.
8. A method of fabricating the transistor of claim 1 , the method comprising:
selectively doping a layer of single-crystalline semiconductor material to form one or more doped regions, wherein the one or more doped regions define a source region, a drain region and a gate region in the layer of single-crystalline semiconductor material and the layer of single-crystalline material is attached to a sacrificial substrate;
annealing the doped layer of single-crystalline semiconductor material, whereby damage to the single-crystalline structure caused by the doping is repaired;
thinning the doped and annealed layer of single-crystalline semiconductor material;
growing a second layer of single-crystalline semiconductor material on the thinned first layer, wherein the second layer is a strained layer;
growing a third layer of single-crystalline semiconductor material on the second layer of single-crystalline semiconductor material, wherein the semiconductor material of the first and third layers is the same material and the thicknesses of the first and third layers are substantially equal; and
releasing the trilayer structure from the sacrificial substrate, whereby the released trilayer structure has self-sustained strain that is shared between the three layers;
adhering the released trilayer structure to a mechanically flexible substrate structure disposed below and in contact with the third layer of single-crystalline semiconductor material;
forming a gate dielectric on the gate region in the first layer of single-crystalline semiconductor material of the released trilayer structure;
forming a gate contact over the gate dielectric;
forming a source contact in electrical communication with the source region in the first layer of single-crystalline semiconductor material; and
forming a drain contact in electrical communication with the drain region in the first layer of single-crystalline semiconductor material.