Self-isolated conductive bridge memory device

1. A conductive-bridge random access memory device comprising:

a second metal layer configured to provide second metal cations;

a layer of insulator adjacent to the second metal layer, the layer of insulator comprising a layer of first insulator and a layer of second insulator, the layer of second insulator being adjacent to the second metal layer; and

a first metal layer adjacent to the layer of first insulator, the first metal layer being opposite to the second metal layer,

wherein a crystalline structure density of the layer of second insulator is higher than a crystalline structure density of the layer of first insulator, such that the layer of insulator forms an integral selector element in which metallic filament growth speed is lower in the layer of second insulator than in the layer of first insulator.

2. The conductive-bridge random access memory device according to claim 1 , wherein the layer of first insulator and the layer of second insulator consist of a same insulating material.

3. The conductive-bridge random access memory device according to claim 1 , further comprising a buffer layer in between the second metal and the layer of second insulator.

4. The conductive-bridge random access memory device according to claim 1 , wherein layer density of the layer of second insulator is 85% or more of bulk density of the layer of second insulator and layer density of the layer of first insulator is less than 85% of bulk density of the layer of first insulator.

5. The conductive-bridge random access memory device according to claim 1 , wherein the layer of insulator has a thickness tI, the layer of first insulator has a thickness tI 1 and the layer of second insulator has a thickness tI 2 , wherein the thickness of the layer of second insulator tI 2 is between 1 and 20 nm.

6. The conductive-bridge random access memory device according to claim 5 , wherein the thickness of the layer of first insulator tI 1 is substantially equal to a length of metallic filament during filament growth.

7. The conductive-bridge random access memory device according to claim 1 , wherein the layer of second insulator is a thermally grown silicon-oxide.

8. A method of manufacturing a CBRAM memory cell comprising:

forming a first metal layer;

forming a layer of first insulator on the first metal layer;

forming a layer of second insulator on the layer of first insulator; and

forming a second metal on the layer of second insulator,

and wherein a crystalline structure density of the layer of second insulator is higher than a crystalline structure density of the layer of first insulator, such that the layer of first insulator and the layer of second insulator form an integral selector element in which metallic filament growth speed is lower in the layer of second insulator than in the layer of first insulator.

9. The method of manufacturing a CBRAM memory cell according to claim 8 , wherein layer density of the layer of second insulator is 85% or more of bulk density of the layer of second insulator and layer density of the layer of first insulator is less than 85% of bulk density of the layer of first insulator.

10. The conductive-bridge random access memory device according to claim 1 , wherein a diffusivity of the layer of second insulator is higher than a diffusivity of the layer of first insulator.

11. The conductive-bridge random access memory device according to claim 1 , wherein a diffusivity of the layer of second insulator is lower than 5e-6 cm 2 /s, and a diffusivity of the layer of first insulator is higher than 5e-6 cm 2 /s.

12. The method of claim 8 , wherein a diffusivity of the layer of second insulator is higher than a diffusivity of the layer of first insulator.

13. The method of claim 8 , wherein a diffusivity of the layer of second insulator is lower than 5e-6 cm 2 /s, and a diffusivity of the layer of first insulator is higher than 5e-6 cm 2 /s.

14. A conductive-bridge random access memory device comprising:

a second metal layer configured to provide second metal cations;

a layer of insulator adjacent to the second metal layer, the layer of insulator comprising a layer of first insulator and a layer of second insulator, the layer of second insulator being adjacent to the second metal layer; and

a first metal layer adjacent to the layer of first insulator, the first metal layer being opposite to the second metal layer,

wherein a diffusivity of the layer of second insulator is higher than a diffusivity of the layer of first insulator, such that the layer of insulator forms an integral selector element in which metallic filament growth speed is lower in the layer of second insulator than in the layer of first insulator.

15. The conductive-bridge random access memory device according to claim 14 , wherein the diffusivity of the layer of second insulator is lower than 5e-6 cm 2 /s, and the diffusivity of the layer of first insulator is higher than 5e-6 cm 2 /s.

16. The conductive-bridge random access memory device according to claim 14 , wherein a porosity of the layer of second insulator is lower than a porosity of the layer of first insulator.

17. The conductive-bridge random access memory device according to claim 1 , wherein the layer of first insulator and the layer of second insulator are different insulating materials.

18. The method of according to claim 8 , wherein the layer of first insulator and the layer of second insulator are different insulating materials.

19. The conductive-bridge random access memory device according to claim 14 , wherein the layer of first insulator and the layer of second insulator are different insulating materials.