Methods for fabricating bipolar transistors with improved gain
View Patent ↗Insufficient gain in bipolar transistors ( 20 ) is improved by providing an alloyed (e.g., silicided) emitter contact ( 452 ) smaller than the overall emitter ( 42 ) area. The improved emitter ( 42 ) has a first emitter (FE) portion ( 42 - 1 ) of a first dopant concentration C FE , and a second emitter (SE) portion ( 42 - 2 ) of a second dopant concentration C SE . Preferably C SE ≧C FE . The SE portion ( 42 - 2 ) desirably comprises multiple sub-regions ( 45 i, 45 j, 45 k ) mixed with multiple sub-regions ( 47 m, 47 n, 47 p ) of the FE portion ( 42 - 1 ). A semiconductor-metal alloy or compound (e.g., a silicide) is desirably used for Ohmic contact ( 452 ) to the SE portion ( 42 - 2 ) but substantially not to the FE portion ( 42 - 1 ). Including the FE portion ( 42 - 1 ) electrically coupled to the SE portion ( 42 - 2 ) but not substantially contacting the emitter contact ( 452 ) on the SE portion ( 42 - 2 ) provides gain increases of as much as ˜278.
1. A method for forming a bipolar transistor, comprising the steps of:
providing a semiconductor (SC) containing substrate having a first surface, and with a base region therein extending to the first surface;
forming in the base region proximate the first surface an emitter comprising a first emitter (FE) portion of a first dopant concentration C FE and a second emitter (SE) portion of a second dopant concentration C SE ; and
providing multiple Ohmic contacts on the emitter, substantially on the SE portion but substantially not on the FE portion.
2. The method of claim 1 , further comprising:
prior to providing the multiple Ohmic contacts, forming on the first surface at least partly over the emitter a dopant blocking layer having closed portions adapted to substantially prevent entry of materials therethrough and multiple laterally dispersed open portions adapted to facilitate entry of the materials therethrough.
3. The method of claim 2 wherein the materials comprise at least one of the group consisting of dopant materials for forming the second emitter portions and electrical contact materials for forming the Ohmic contacts.
4. The method of claim 1 , wherein the emitter is formed such that the SE portion comprises multiple sub-emitters laterally mixed with or adjacent to parts of the FE portion or both.
5. The method of claim 1 , wherein the emitter is formed such that C SE ≧C FE .
6. The method of claim 1 , wherein the emitter is formed to have a total lateral emitter area (TEA), wherein the Ohmic contacts are formed to have a total lateral emitter contact area (ECA), and wherein ECA<TEA.
7. The method of claim 1 , wherein the emitter is formed to have a total lateral emitter area (TEA), while the second emitter portion has a total lateral second emitter area (SEA), and wherein SEA<TEA.
8. The method of claim 7 , wherein the emitter is formed such that SEA≦0.95*TEA.
9. The method of claim 8 , wherein forming comprises:
forming the FE emitter portion to include a first plurality of sub-emitters; and
forming the SE portion to include a second plurality of sub-emitters proximate the first plurality of sub-emitters.
10. The method of claim 9 , wherein the second plurality of sub-emitters are substantially electrically coupled in parallel.
11. A method, comprising:
providing a semiconductor (SC) containing substrate having a first surface, and with a base region therein extending to the first surface; and
forming in the base region proximate the first surface an emitter comprising a first emitter (FE) portion of a first dopant concentration C FE and a second emitter (SE) portion of a second dopant concentration C SE of the same type dopant;
wherein the emitter is formed such that C SE ≧C FE .
12. The method of claim 11 further comprising forming a semiconductor-metal Ohmic emitter contact substantially on the SE portion and substantially not on the FE portion.
13. The method of claim 11 , wherein the SE dopant concentration C SE and the FE dopant concentration C FE have a ratio C SE /C FE in a range of about C SE /C FE =1 to 10000.
14. The method of claim 11 , wherein the emitter is formed such that the SE portion is laterally mixed with at least part of the FE portion.
15. The method of claim 14 , wherein a part of the FE portion is substantially laterally interspersed with the SE portion.
16. The method of claim 11 , wherein the emitter comprises silicon and the semiconductor-metal Ohmic emitter contact comprises a silicide.
17. A method, comprising:
providing a semiconductor (SC) containing substrate having a first surface, and with a base region therein extending to the first surface; and
forming in the base region proximate the first surface an emitter comprising a first emitter (FE) portion of a first dopant concentration C FE and a second emitter (SE) portion of a second dopant concentration C SE ;
wherein the SE portion comprises multiple sub-emitters at least partially laterally interspersed with the FE portion.
18. The method of claim 17 further comprising forming an Ohmic contact from a metal-SC compound or alloy substantially on the SE portion and not on the FE portion.
19. The method of claim 17 wherein the emitter laterally has a total emitter area (TEA), wherein the Ohmic contact has an Ohmic emitter contact area (ECA), and wherein ECA<TEA.
20. The method of claim 17 , further comprising forming the SE portion to include multiple sub-emitters each having a portion of the Ohmic contact thereon.