Background calibration of aperture center errors in analog to digital converters
View Patent ↗A method of background calibration of aperture center errors in a data communication system is provided. In an implementation, in response to detection of a low sampler output (“0”) in between two high sampler outputs (“1”), the method includes: calculating a signal derivative of an ADC output signal at the time of the detected low output; and adjusting timing at a selected sampler based on the calculated signal derivative. In an example implementation, the method includes watching for bubbles in the thermometer code output, and estimating the first derivative of the signal at the time of the bubble, then estimating the sign of the errors. In an example implementation, the errors are used in a control loop to reduce the aperture center error.
1. A method of background calibration of aperture timing errors in a data communication system including an analog to digital converter (ADC) having a plurality of samplers, comprising:
in response to detection of a low sampler output (“0”) in between two high sampler outputs (“1”), the low and high sampler outputs being at the same sampler in the plurality of samplers:
calculating a signal derivative of an ADC output signal at the time of the detected low output; and
adjusting timing at a selected sampler based on the calculated signal derivative.
2. The method of claim 1 wherein:
calculating the signal derivative comprises detecting a negative timing error; and
adjusting the timing at the selected sampler comprises moving the timing later in time such that sampler timing occurs later than before the adjustment to compensate for the detected negative timing error.
3. The method of claim 2 wherein the negative timing error is detected as:
(Bubble[ i ])AND(SignalDerivative[ i]> 0);
where Bubble is defined as a low sampler output (“0”) below a high sampler output (“1”), and wherein
SignalDerivative[ i]=ADC output[ i]−ADC output[ i− 1].
4. The method of claim 1 wherein:
calculating the signal derivative comprises detecting a positive timing error; and
adjusting the timing at the selected sampler comprises moving the timing earlier in time such that sampler timing occurs earlier than before the adjustment to compensate for the detected positive timing error.
5. The method of claim 4 wherein the positive timing error is detected as:
(Bubble[ i ])AND(SignalDerivative[ i]< 0);
where Bubble is defined as a low sampler output (“0”) below a high sampler output (“1”), and wherein
SignalDerivative[ i]=ADC output[ i]−ADC output[ i− 1].
6. The method of claim 1 wherein:
calculating the signal derivative comprises comparing an ADC output level at a current time sample with an ADC output level at a previous time sample.
7. The method of claim 1 further comprising:
detecting the low sampler output in between the two high sampler outputs based on observation of a thermometer encoded sampler output.
8. The method of claim 1 wherein:
adjusting the timing at the selected sampler comprises a digital signal processor (DSP) interpolation to resample a waveform to provide equally timing spaced output samples.
9. The method of claim 8 wherein the DSP interpolation is performed using a map of ADC output level values and aperture timing error estimations.
10. The method of claim 8 further comprising:
counting a number of aperture error events for each of the plurality of samplers;
converting the aperture error count to an aperture error value in real time units;
building a map of ADC output levels and their associated aperture timing error; and
resampling, using the map and in the digital domain, a waveform corresponding to the ADC output signal using the real timing locations for each ADC output value.
11. A computer-readable storage device storing statements and instructions for execution by a processor to perform a method of background calibration of aperture timing errors in a data communication system including an analog to digital converter (ADC) having a plurality of samplers, comprising:
in response to detection of a low sampler output (“0”) in between two high sampler outputs (“1”), the low and high sampler outputs being at the same sampler in the plurality of samplers:
calculating a signal derivative of an ADC output signal at the time of the detected low output; and
adjusting timing at a selected sampler based on the calculated signal derivative.
12. A system for background calibration of aperture timing errors in a data communication system including an analog to digital converter (ADC) having a plurality of samplers, comprising:
a signal processor configured to, in response to detection of a low sampler output (“0”) in between two high sampler outputs (“1”), the low and high sampler outputs being at the same sampler in the plurality of samplers, calculate a signal derivative of an ADC output signal at the time of the detected low output; and
a timing adjustment circuit configured to adjust timing at a selected sampler based on the calculated signal derivative.
13. The system of claim 12 wherein:
the signal processor detects a negative timing error; and
the timing adjustment circuit is configured to move the timing later in time such that sampler timing occurs later than before the adjustment to compensate for the detected negative timing error.
14. The system of claim 13 wherein the negative timing error is detected as:
(Bubble[ i ])AND(SignalDerivative[ i]> 0);
where Bubble is defined as a low sampler output (“0”) below a high sampler output (“1”), and wherein
SignalDerivative[ i]=ADC output[ i]−ADC output[ i− 1].
15. The system of claim 12 wherein:
the signal processor is configured to detect a positive timing error; and
the timing adjustment circuit is configured to move the timing earlier in time such that sampler timing occurs earlier than before the adjustment to compensate for the detected positive timing error.
16. The system of claim 15 wherein the positive timing error is detected as:
(Bubble[ i ])AND(SignalDerivative[ i]< 0);
where Bubble is defined as a low sampler output (“0”) below a high sampler output (“1”), and wherein
SignalDerivative[ i]=ADC output[ i]−ADC output[ i− 1].
17. The system of claim 12 wherein:
the signal processor is configured to compare an ADC output level at a current time sample with an ADC output level at a previous time sample.
18. The system of claim 12 wherein:
the signal processor is configured to detect the low sampler output in between the two high sampler outputs based on observation of a thermometer encoded sampler output.
19. The system of claim 12 further comprising:
a digital signal processor (DSP), the signal processor and the timing adjustment circuit being integral with the DSP, the DSP being configured to adjust the timing at the selected sampler using DSP interpolation to resample a waveform to provide equally timing spaced output samples.
20. The system of claim 19 wherein the DSP is configured to perform the DSP interpolation using a map of ADC output level values and aperture timing error estimations.
21. The system of claim 19 wherein the DSP is configured to:
count a number of aperture error events for each of the plurality of samplers;
convert the aperture error count to an aperture error value in real time units;
build a map of ADC output levels and their associated aperture timing error; and
resample, using the map and in the digital domain, a waveform corresponding to the ADC output signal using the real timing locations for each ADC output value.