Display device having a multilayer wiring structure including a wiring in a lower electrode layer
Any one of a write scanning line, a power source supply line, and a video signal line is structured as a subsidiary wiring disposed in the same layer as that having a lower electrode disposed therein. The subsidiary wiring is used in the power source supply line through which a power source drive pulse to be pulse-driven is transmitted, or other wirings (such as the write scanning line and the video signal line).
1. A display device comprising:
a signal line in a first layer, the signal line extends in a signal line direction;
a scanning line in a second layer that is different from the first layer, the scanning line extends in a direction that is orthogonal to the signal line direction;
an electro-optic element that includes an organic layer between an upper electrode and a lower electrode, the lower electrode is in a third layer;
a transistor layer between a first wiring layer and an insulating layer, the insulating layer is between the lower electrode and the transistor layer;
a transistor that is switchable between electrically connecting wiring to a supply line and electrically disconnecting the wiring from the supply line, the wiring electrically connects the lower electrode to the transistor; and
a plate of a storage capacitor in the first layer, the plate of the storage capacitor is a gate electrode of a drive transistor,
wherein the electro-optic element covers the wiring in a top plan view of the display device,
wherein a channel region of the transistor layer is between a drain region of the transistor layer and a source region of the transistor layer, the wiring electrically connects the source region to the lower electrode, and
wherein the channel region is another plate of the storage capacitor.
2. A display device comprising: an electro-optic element that covers interlayer wiring in a top plan view of the display device, the electro-optic element includes an organic layer between an upper electrode and a lower electrode;
a transistor layer between a first wiring layer and an insulating layer, the insulating layer is between the lower electrode and the transistor layer; and
a plate of a storage capacitor in the first wiring layer,
wherein a channel region of the transistor layer is between a drain region of the transistor layer and a source region of the transistor layer, the interlayer wiring electrically connects the source region to the lower electrode, and
wherein the plate of the storage capacitor is a gate electrode of a drive transistor, the channel region is another plate of the storage capacitor.
3. The display device of claim 2 , wherein the drive transistor is switchable between electrically connecting the interlayer wiring to a supply line and electrically disconnecting the interlayer wiring from the supply line.
4. The display device of claim 2 , further comprising:
a plate of a first subsidiary capacitor in the first wiring layer, the drain region is another plate of the first subsidiary capacitor.
5. The display device of claim 4 , further comprising:
a plate of a second subsidiary capacitor in the insulating layer, the drain region is another plate of the second subsidiary capacitor.
6. The display device of claim 5 , wherein the plate of the first subsidiary capacitor is electrically connected directly to the plate of the second subsidiary capacitor.
7. The display device of claim 5 , wherein the plate of the second subsidiary capacitor is electrically connected directly to the upper electrode.
8. The display device of claim 2 , wherein the electro-optic element is configured to emit light.
9. The display device of claim 2 , wherein the upper electrode is electrically connected directly to ground.
10. The display device of claim 2 , wherein the lower electrode is an anode electrode and the upper electrode is a cathode electrode.
11. The display device of claim 2 , wherein a pixel circuit includes the electro-optic element and the transistor layer.