IP Library Granted Patent US 9,312,257
Granted Patent B2
US 9,312,257 · App. 13/768,753 · Granted Apr 12, 2016

Semiconductor device

Inventors: Shunpei Yamazaki (Tokyo, JP); Kensuke Yoshizumi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/04H01L27/108H01L27/1156G11C16/10H01L21/84H01L27/10805H01L27/11521H01L27/11551H01L27/1203H01L29/24
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Quick Facts
Patent No.
US 9,312,257
App. No.
13/768,753
Granted
Apr 12, 2016
Kind
B2
Abstract

A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are provided over the first transistor so as to overlap with a gate of the first transistor. A semiconductor layer of the second transistor and a dielectric layer of the capacitor are directly connected to the gate of the first transistor. The second transistor is a vertical transistor, where its channel direction is perpendicular to an upper surface of a semiconductor layer of the first transistor.

Claims (48)

1. A semiconductor device comprising:

a first transistor comprising a first semiconductor layer; and

a second transistor being over and overlapping with the first transistor,

wherein a channel length direction between source and drain regions of the second transistor is perpendicular to an upper surface of the first semiconductor layer.

2. The semiconductor device according to claim 1 , further comprising a capacitor which is located over and overlaps with the first transistor.

3. The semiconductor device according to claim 1 , wherein a channel in the first semiconductor layer overlaps with the channel of the second transistor.

4. The semiconductor device according to claim 1 , wherein the first transistor is located over an insulating surface.

5. The semiconductor device according to claim 1 ,

wherein the first transistor further comprises:

a first insulating layer over the first semiconductor layer; and

a first electrode layer over the first insulating layer, and

wherein the second transistor comprises:

a second semiconductor layer in direct contact with the first electrode layer;

a second insulating layer adjacent to a side surface of the second semiconductor layer;

a second electrode layer adjacent to the side surface of the second semiconductor layer with the second insulating layer therebetween; and

a third electrode layer over the second semiconductor layer.

6. The semiconductor device according to claim 5 , wherein the second electrode layer is located between the first electrode layer and the third electrode layer.

7. The semiconductor device according to claim 5 ,

wherein the second semiconductor layer comprises an oxide semiconductor, and

wherein the first semiconductor layer comprises a material selected from single crystalline silicon, amorphous silicon, and polycrystalline silicon.

8. The semiconductor device according to claim 5 , further comprising a capacitor which comprises:

a dielectric layer in direct contact with the first electrode layer; and

a fourth electrode layer over the dielectric layer.

9. The semiconductor device according to claim 8 , wherein the second semiconductor layer and the dielectric layer exist in the same layer.

10. The semiconductor device according to claim 8 , wherein the second insulating layer and the dielectric layer exist in the same layer.

11. The semiconductor device according to claim 8 , wherein the second insulating layer and the second electrode layer surround the second semiconductor layer.

12. An electronic device comprising the semiconductor device according to claim 1 .

13. A semiconductor device comprising:

a first semiconductor layer;

a first insulating layer over the first semiconductor layer;

a first electrode layer over the first insulating layer;

a second semiconductor layer over and in direct contact with the first electrode layer;

a second insulating layer adjacent to a side surface of the second semiconductor layer;

a second electrode layer adjacent to the side surface of the second semiconductor layer with the second insulating layer therebetween; and

a third electrode layer over and in direct contact with the second semiconductor layer.

14. The semiconductor device according to claim 13 , wherein a channel in the first semiconductor layer overlaps with a channel in the second semiconductor layer.

15. The semiconductor device according to claim 13 , wherein the second electrode layer is located between the first electrode layer and the third electrode layer.

16. The semiconductor device according to claim 13 , wherein the first semiconductor layer is located over an insulating surface.

17. The semiconductor device according to claim 13 , wherein the second insulating layer and the second electrode layer surround the second semiconductor layer.

18. The semiconductor device according to claim 13 ,

wherein the second semiconductor layer comprises an oxide semiconductor, and

wherein the first semiconductor layer comprises a material selected from single crystalline silicon, amorphous silicon, and polycrystalline silicon.

19. The semiconductor device according to claim 13 , further comprising:

a dielectric layer over and in direct contact with the first electrode layer; and

a fourth electrode layer over the dielectric layer.

20. The semiconductor device according to claim 19 , wherein the second semiconductor layer and the dielectric layer exist in the same layer.

21. The semiconductor device according to claim 19 , wherein the second insulating layer and the dielectric layer exist in the same layer.

22. An electronic device comprising the semiconductor device according to claim 13 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2013
From: YAMAZAKI, SHUNPEI; YOSHIZUMI, KENSUKE
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 029849/0066 →
Priority Claims (1)
JP 2012-044109 · Feb 29, 2012 · national
Continuity (1)
Related Publication 20130221356A1 · Aug 29, 2013