Methods for forming electrostatic discharge protection clamps with increased current capabilities
View Patent ↗Methods for forming an electrostatic discharge protection (ESD) clamps are provided. In one embodiment, the method includes forming at least one transistor having a first well region of a first conductivity type extending into a substrate. At least one transistor is formed having another well region of a second opposite conductivity type, which extends into the substrate to partially form a collector. The lateral edges of the transistor well regions are separated by a distance D, which at least partially determines a threshold voltage Vt 1 of the ESD clamp. A base contact of the first conductivity type is formed in the first well region and separated from an emitter of the second conductivity type by a lateral distance Lbe. The first doping density and the lateral distance Lbe are selected to provide a parasitic base-emitter resistance Rbe in the range of 1<Rbe<800 Ohms.
1. A method for forming an electrostatic discharge protection (ESD) clamp having a predetermined threshold voltage Vt 1 , the method comprising:
providing a semiconductor substrate having a first surface;
producing at least a first bipolar transistor on the semiconductor substrate comprising a base of a first conductivity type underlying the first surface, a base contact of the first conductivity type extending into the base from the first surface, an emitter of a second, opposite, conductivity type extending into the base from the first surface and laterally separated from the base contact at the first surface by a distance Lbe, and a collector proximate the base;
wherein the base is formed to include:
a first base portion containing the base contact and the emitter and having a first base dopant concentration;
a second base portion located laterally between the first portion and a first boundary and having a second base dopant concentration; and
a third base portion of width D located laterally between the boundary and a portion of the collector and having a third base dopant concentration,
wherein the threshold Vt 1 is determined at least in part by the width D;
wherein the first base dopant concentration is less than the second base dopant concentration; and
wherein Lbe is in the range of about 0.7 to 23 micrometers.
2. The method of claim 1 wherein Lbe is in the range of about 1 to 15 micrometers.
3. The method of claim 1 wherein the first base portion has a doping density in the range of about 1E16 to 1E18 cm −3 .
4. The method of claim 1 wherein the second base doping density is at least twice the first base doping density.
5. The method of claim 1 wherein the transistor has a parasitic emitter-base resistance Rbe in the range of 1<Rbe<800 Ohms.
6. The method of claim 1 wherein the first base portion has a first base sheet resistance and the second base portion has a second base sheet resistance, and the first base sheet resistance is larger than the second base sheet resistance.
7. The method of claim 6 wherein the first base sheet resistance is at least twice the second base sheet resistance.
8. A method for forming an electrostatic discharge protection (ESD) clamp having a predetermined threshold voltage Vt 1 , comprising:
providing a semiconductor substrate having a first surface;
producing at least a first bipolar transistor on the semiconductor substrate comprising a base of a first conductivity type underlying the first surface, a base contact of the first conductivity type extending into the base from the first surface, an emitter of a second, opposite, conductivity type extending into the base from the first surface and laterally separated from the base contact at the first surface by a distance Lbe, and a collector proximate the base;
wherein the base comprises a first base portion containing the base contact and the emitter and having a first base dopant concentration, a second base portion located laterally between the first portion and a first boundary and having a second base dopant concentration, and a third base portion of width D located laterally between the boundary and a portion of the collector and having a third base dopant concentration, wherein the threshold Vt 1 is determined at least in part by the width D;
wherein the first base dopant concentration is less than the second base dopant concentration; and
wherein the first base portion has a first base sheet resistance and the second base portion has a second base sheet resistance, and the first base sheet resistance is larger than the second base sheet resistance.
9. The method of claim 8 wherein the first base sheet resistance is at least twice the second base sheet resistance.
10. The method of claim 8 wherein the first base sheet resistance is at least 2 to 20 times the second base sheet resistance.
11. The method of claim 8 wherein Lbe is in the range of about 0.7 to 23 micrometers.
12. The method of claim 8 wherein the first base portion has a doping density in the range of about 1E16 to 1E18 cm −3 .
13. The method of claim 8 wherein the second base doping density is at least twice the first base doping density.
14. The method of claim 8 wherein the first bipolar transistor has a parasitic emitter-base resistance Rbe in the range of 1<Rbe<800 Ohms.
15. The method of claim 8 wherein the first bipolar transistor has a distance D=D 1 , and wherein method further comprises producing a second bipolar transistor analogous to the first transistor but having a distance D′=D 2 different than D 1 .