Integrated Circuit Including Gate Electrode Tracks That Each Form Gate Electrodes of Different Transistor Types With Intervening Non-Gate-Forming Gate Electrode Track

A first gate electrode track includes a first gate electrode feature forming a first n-channel transistor with a first n-diffusion region and a second gate electrode feature forming a first p-channel transistor with a first p-diffusion region. A second gate electrode track includes a third gate electrode feature forming a second n-channel transistor with a second n-diffusion region and a fourth gate electrode feature forming a second p-channel transistor with a second p-diffusion region. A third gate electrode track is positioned between and parallel to the first and second gate electrode tracks, such that no other gate electrode track is positioned between the third gate electrode track and either of the first or second gate electrode tracks. The third gate electrode track is not interrupted between the first and second gate electrode tracks. The third gate electrode track does not include a gate electrode feature of any transistor.