IP Library Granted Patent US 8,836,380
Granted Patent B2
US 8,836,380 · App. 13/780,956 · Granted Sep 16, 2014

Bootstrap circuit

Inventor: Yoshihiro Takemae (Minato, JP)
Assignee: Transphorm Japan, Inc.
H03K17/08
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,836,380
App. No.
13/780,956
Granted
Sep 16, 2014
Kind
B2
Abstract

A semiconductor device, includes: a first field effect transistor having one terminal to which a first electrical potential is given; a second field effect transistor having one terminal to which a second electrical potential smaller than the first electrical potential is given; a controller that controls each electrical potential of each control terminal of the first field effect transistor and the second field effect transistor; a capacitor element having one end connected to the control terminal of the first field effect transistor, the capacitor element being charged by the control of the controller; and a load element connected between another terminal of the first field effect transistor and another terminal of the second field effect transistor.

Claims (22)

1. A bootstrap circuit, comprising:

a first field effect transistor having one terminal to which a first electrical potential is given;

a second field effect transistor having one terminal to which a second electrical potential smaller than the first electrical potential is given;

a controller that controls each electrical potential of each control terminal of the first field effect transistor and the second field effect transistor;

a capacitor element having one end connected to the control terminal of the first field effect transistor, the capacitor element being charged by the control of the controller; and

a load element connected between another terminal of the first field effect transistor and another terminal of the second field effect transistor and

another end of the capacitor element is connected to the another terminal of the second field effect transistor

wherein the load element is a depletion-type field effect transistor, a control terminal of the depletion-type field effect transistor being connected to one terminal of the depletion-type field effect transistor.

2. A bootstrap circuit comprising:

a first field effect transistor having one terminal to which a first electrical potential is given;

a second field effect transistor having one terminal to which a second electrical potential smaller than the first electrical potential is given;

a controller that controls each electrical potential of each control terminal of the first field effect transistor and the second field effect transistor;

a capacitor element having one end connected to the control terminal of the first field effect transistor, the capacitor element being charged by the control of the controller;

a load element connected between another terminal of the first field effect transistor and another terminal of the second field effect transistor;

a third field effect transistor having one terminal to which the first electrical potential is given; and

a fourth field effect transistor having one terminal connected to another terminal of the third field effect transistor, and another terminal to which the second electrical potential is given;

wherein another end of the capacitor element is connected to the one terminal of the fourth field effect transistor, and

the controller further controls each electrical potential of each control terminal of the third field effect transistor and the fourth field effect transistor.

3. The bootstrap circuit as claimed in claim 2 , wherein each of the third field effect transistor and the fourth field effect transistor includes a GaN semiconductor.

4. The bootstrap circuit as claimed in claim 2 , wherein the load element is a depletion-type field effect transistor, a control terminal of the depletion-type field effect transistor being connected to one terminal of the depletion-type field effect transistor.

5. The bootstrap circuit as claimed in claim 2 , wherein the load element is a resistance element.

6. The bootstrap circuit as claimed in claim 2 , wherein each of the first field effect transistor and the second field effect transistor includes a GaN semiconductor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: FUJITSU SEMICONDUCTOR LIMITED
To: TRANSPHORM JAPAN, INC.
Reel/Frame 032865/0131 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2013
From: TAKEMAE, YOSHIHIRO
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 029907/0479 →
Priority Claims (1)
JP 2012-066382 · Mar 22, 2012 · national
Continuity (1)
Related Publication 20130249605A1 · Sep 26, 2013