IP Library Granted Patent US 8,866,519
Granted Patent B1
US 8,866,519 · App. 13/781,100 · Granted Oct 21, 2014

System and method for reducing spectral pollution in a signal

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Quick Facts
Patent No.
US 8,866,519
App. No.
13/781,100
Granted
Oct 21, 2014
Kind
B1
Abstract

A system and a method for modulating an input signal are provided. The system includes a fractional-N phase locked loop (PLL) for frequency multiplying the input signal by a multiplication factor to generate an output signal. The fractional-N PLL includes an input signal path and a feedback signal path. The system includes a controllable delay line for inserting a linearizing tone into the input signal path or the feedback signal path of the fractional-N PLL.

Claims (32)

1. A system comprising:

a fractional-N phase locked loop (PLL) for frequency multiplying an input signal by a multiplication factor to generate an output signal, the fractional-N PLL comprising an input signal path and a feedback signal path; and

a dynamically adjustable delay line controllable by a linearizing phase modulation signal for inserting a linearizing tone into the input signal path or the feedback signal path of the fractional-N PLL to suppress spurious spectral content generated by a non-linearity in a phase detector and charge pump of the fractional-N PLL.

2. The system of claim 1 , wherein a frequency of the linearizing tone is unrelated to a quantization noise repetition frequency of the fractional-N PLL.

3. The system of claim 1 , wherein the fractional-N PLL comprises a phase detector and a charge pump, and wherein the linearizing tone is selected such that a phase detector and charge pump transfer function of the fractional-N PLL is linearized over a time scale near or below an inherent low pass time constant of the fractional-N PLL.

4. The system of claim 1 , wherein the linearizing tone comprises a signal having a frequency at least ten times a bandwidth of the fractional-N PLL.

5. The system of claim 1 , wherein the linearizing tone comprises a plurality of tonal phase modulation signals and wherein each of the plurality of tonal phase modulation signals has a unique frequency.

6. The system of claim 5 , wherein the plurality of tonal phase modulation signals avoid intermodulation below a low pass bandwidth of the fractional-N PLL.

7. The system of claim 3 , wherein a frequency and amplitude of the linearizing tone is optimized for a fraction value of the fractional-N PLL.

8. The system of claim 1 , wherein the linearizing phase modulation signal is generated by a multi-modulus divider in the feedback signal path of the fractional-N PLL.

9. The system of claim 8 , wherein the multi-modulus divider produces the linearizing tone, and wherein the linearizing tone is superimposed on an underlying fractional-N phase modulation signal of the fractional-N PLL.

10. The system of claim 1 , wherein the linearizing phase modulation signal is a modulated analog delay signal or a modulated digital delay signal.

11. The system of claim 1 , wherein the linearizing tone comprises a simple tone with a frequency equal to half of a frequency of the input signal.

12. The system of claim 1 , wherein the linearizing tone comprises equal magnitude positive and negative phase offsets for alternating input signal cycles.

13. A method comprising:

frequency multiplying, using a fractional-N phase locked loop (PLL), an input signal by a multiplication factor to generate an output signal, the fractional-N PLL comprising an input signal path and a feedback signal path; and

inserting a linearizing tone into the input signal path or the feedback signal path of the fractional-N PLL using a dynamically adjustable delay line controllable by a linearizing phase modulation signal to suppress spurious spectral content generated by a non-linearity in a phase detector and charge pump of the fractional-N PLL.

14. The method of claim 13 , wherein a frequency of the linearizing tone is unrelated to a quantization noise repetition frequency of the fractional-N PLL.

15. The method of claim 13 , wherein the fractional-N PLL comprises a phase detector and a charge pump, and wherein the method further comprises selecting the linearizing tone such that a phase detector and charge pump transfer function of the fractional-N PLL is linearized over a time scale near or below an inherent low pass time constant of the fractional-N PLL.

16. The method of claim 13 , wherein the linearizing tone comprises a signal having a frequency at least ten times a bandwidth of the fractional-N PLL.

17. The method of claim 13 , wherein the linearizing tone comprises a plurality of tonal phase modulation signals and wherein each of the plurality of tonal phase modulation signals has a unique frequency.

18. The method of claim 17 , wherein the plurality of tonal phase modulation signals avoid intermodulation below a low pass bandwidth of the fractional-N PLL.

19. The method of claim 15 further comprising:

optimizing a frequency and amplitude of the linearizing tone for a fraction value of the fractional-N PLL.

20. The method of claim 13 further comprising:

generating the linearizing phase modulation signal using a multi-modulus divider in the feedback signal path of the fractional-N PLL.

21. The method of claim 20 further comprising:

superimposing the linearizing tone on an underlying fractional-N phase modulation signal of the fractional-N PLL.

22. The method of claim 13 wherein:

the linearizing phase modulation signal is a modulated analog delay signal or a modulated digital delay signal.

23. The method of claim 13 , wherein the linearizing tone comprises a simple tone with a frequency equal to half of a frequency of the input signal.

24. The method of claim 13 , wherein the linearizing tone comprises equal magnitude positive and negative phase offsets for alternating input signal cycles.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.; MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
Reel/Frame 046251/0271 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2016
From: MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
To: MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 040045/0938 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC.
To: MAXLINEAR ASIA SINGAPORE PTE LTD.
Reel/Frame 039463/0743 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Apr 28, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MICROSEMI STORAGE SOLUTIONS (U.S.), INC. (FORMERLY KNOW AS PMC-SIERRA US, INC.); MICROSEMI STORAGE SOLUTIONS, INC. (FORMERLY KNOW AS PMC-SIERRA, INC.)
Reel/Frame 038557/0236 →
CHANGE OF NAME Recorded Mar 22, 2016
From: PMC-SIERRA US, INC.
To: MICROSEMI STORAGE SOLUTIONS (U.S.), INC.
Reel/Frame 038213/0291 →
PATENT SECURITY AGREEMENT Recorded Feb 3, 2016
From: MICROSEMI STORAGE SOLUTIONS, INC. (F/K/A PMC-SIERRA, INC.); MICROSEMI STORAGE SOLUTIONS (U.S.), INC. (F/K/A PMC-SIERRA US, INC.)
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037689/0719 →
RELEASE OF SECURITY INTEREST Recorded Feb 1, 2016
From: BANK OF AMERICA, N.A.
To: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
Reel/Frame 037675/0129 →
SECURITY INTEREST IN PATENTS Recorded Aug 6, 2013
From: PMC-SIERRA, INC.; PMC-SIERRA US, INC.; WINTEGRA, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 030947/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2013
From: HIEBERT, MARK
To: PMC-SIERRA US, INC.
Reel/Frame 029898/0716 →