IP Library Granted Patent US 8,910,102
Granted Patent B2
US 8,910,102 · App. 13/781,350 · Granted Dec 9, 2014

Configuring a programmable logic device using a configuration bit stream without phantom bits

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Quick Facts
Patent No.
US 8,910,102
App. No.
13/781,350
Granted
Dec 9, 2014
Kind
B2
Abstract

Techniques and mechanisms generate a configuration bit stream to load into a circuit such as a Programmable Logic Device (PLD). A configuration bit stream may have a reduced size if “phantom bits” not corresponding to configuration elements are removed. However, the PLD may need a full-sized and properly ordered configuration bit stream in order to be properly configured. Techniques and mechanisms are described for selectively adding a “padding bit” to compensate for the missing phantom bits.

Claims (20)

1. A method for configuring a configurable circuit, the method comprising:

receiving, by the configurable circuit, a first configuration bit stream; and

generating, by the configurable circuit, a second configuration bit stream, the second configuration bit stream including at least one padding bit and at least one bit from the received first configuration bit stream, wherein the at least one padding bit corresponds to a location in the configurable circuit without a corresponding configuration element, and wherein the at least one padding bit is included based on information of a design of the configurable circuit, the information of the design of the configurable circuit indicating a distribution of resources types in the configurable circuit.

2. The method of claim 1 , wherein the at least one bit from the received first configuration bit stream included in the second configuration bit stream corresponds to a location in the configurable circuit with a corresponding configuration element.

3. The method of claim 2 , wherein the configuration element is a configuration random access memory (CRAM) cell.

4. The method of claim 1 , wherein the information of a design of the configurable circuit includes a distribution of bits without corresponding configuration elements for a resource type.

5. The method of claim 1 , wherein the information of a design of the configurable circuit includes a distribution of bits with corresponding configuration elements for a resource type.

6. The method of claim 1 , wherein the information of a design of the configurable circuit is stored in the configurable circuit.

7. The method of claim 6 , wherein at least a portion of the information of a design of the configurable circuit that is stored in the configurable circuit is from a header portion of the received first configuration bit stream.

8. A circuit for generating a configuration bit stream for a configurable circuit, the circuit comprising:

an input for receiving a first configuration bit stream; and

a bit stream generation circuit, the bit stream generation circuit configured to generate a second configuration bit stream including at least one padding bit and at least one bit from the received first configuration bit stream, wherein the at least one padding bit corresponds to a location in the configurable circuit without a corresponding configuration element, and wherein the at least one padding bit is included based on information of a design of the configurable circuit, the information of the design of the configurable circuit indicating a distribution of resources types in the configurable circuit.

9. The circuit of claim 8 , wherein the at least one bit from the received first configuration bit stream included in the second configuration bit stream corresponds to a location in the configurable circuit with a corresponding configuration element.

10. The circuit of claim 9 , wherein the configuration element is a configuration random access memory (CRAM) cell.

11. The circuit of claim 8 , wherein the information of a design of the configurable circuit includes a distribution of bits without corresponding configuration elements for a resource type.

12. The circuit of claim 8 , wherein the information of a design of the configurable circuit includes a distribution of bits with corresponding configuration elements for a resource type.

13. The circuit of claim 8 , wherein the information of a design of the configurable circuit is stored in the circuit.

14. A circuit for generating a configuration bit stream for a configurable circuit, the circuit comprising:

means for receiving a first configuration bit stream; and

means for generating a second configuration bit stream including at least one padding bit and at least one bit from the received first configuration bit stream, wherein the at least one padding bit corresponds to a location in the configurable circuit without a corresponding configuration element, and wherein the at least one padding bit is included based on information of a design of the configurable circuit, the information of the design of the configurable circuit indicating a distribution of resources types in the configurable circuit.

Assignments (2)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2014
From: CHOE, KOK HENG
To: ALTERA CORPORATION
Reel/Frame 033391/0145 →