IP Library Granted Patent US 9,087,820
Granted Patent B2
US 9,087,820 · App. 13/787,225 · Granted Jul 21, 2015

Electronic substrate

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Quick Facts
Patent No.
US 9,087,820
App. No.
13/787,225
Granted
Jul 21, 2015
Kind
B2
Abstract

An electronic substrate includes: an electronic element provided on a first face of a semiconductor substrate having a through hole; a passive element provided on a second face of the semiconductor substrate; a first part of an interconnection pattern provided on the second face of the semiconductor substrate; an insulating layer provided on the second face of the semiconductor substrate; and a second part of the interconnection pattern provided on the insulating layer.

Claims (29)

1. An electronic substrate comprising:

an electronic element provided at a first face side of a semiconductor substrate having a through hole the through hole having an inner wall;

a passive element provided at a second face side of the semiconductor substrate;

a first part of an interconnection pattern provided at the second face side of the semiconductor substrate;

a first insulating layer provided on a surface of the first face side of the semiconductor substrate;

another insulating layer provided on a surface of the second face side of the semiconductor substrate;

a second part of the interconnection pattern provided on the another insulating layer; and

an insulating film provided on the inner wall of the through hole.

2. An electronic substrate according to claim 1 , wherein

the electronic element is formed from a semiconductor element integrated with the semiconductor substrate.

3. An electronic substrate according to claim 1 , further comprising:

an electrode provided at the first face side; and

a penetrative conductive portion formed in the inner wall the semiconductor substrate and connecting the electrode to the passive element.

4. An electronic substrate according to claim 1 , wherein the passive element is formed from the first part and the second part of the interconnection pattern.

5. An electronic substrate comprising:

an electronic element provided at a first face side of a semiconductor substrate having a through hole, the through hole having an inner wall;

a first part of an interconnection pattern provided at a second face side of the semiconductor substrate;

a first insulating layer provided on a surface of the first face side of the semiconductor substrate;

another insulating layer provided on a surface of the second face side of the semiconductor substrate;

a passive element provided on the another insulating layer;

a second part of the interconnection pattern provided on the another insulating layer; and

an insulating film provided on the inner wall of the through hole.

6. An electronic substrate according to claim 5 , wherein the electronic element is formed from a semiconductor element integrated with the semiconductor substrate.

7. An electronic substrate according to claim 1 , further comprising:

an electrode provided at the first face side; and

a penetrative conductive portion formed in the inner wall the semiconductor substrate and connecting the electrode to the passive element.

8. An electronic substrate according to claim 1 , wherein the passive element is formed from the first part and the second part of the interconnection pattern.

9. An electronic device comprising the electronic substrate according to claim 1 .

10. An electronic device comprising the electronic substrate according to claim 5 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: SEIKO EPSON CORPORATION
To: ADVANCED INTERCONNECT SYSTEMS LIMITED
Reel/Frame 044938/0869 →