IP Library Granted Patent US 8,822,036
Granted Patent B1
US 8,822,036 · App. 13/787,366 · Granted Sep 2, 2014

Sintered silver joints via controlled topography of electronic packaging subcomponents

Inventor: Andrew A. Wereszczak (Oak Ridge, TN)
Assignee: UT-Battelle, LLC
H01L23/10H01L24/80
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Quick Facts
Patent No.
US 8,822,036
App. No.
13/787,366
Granted
Sep 2, 2014
Kind
B1
Abstract

Disclosed are sintered silver bonded electronic package subcomponents and methods for making the same. Embodiments of the sintered silver bonded EPSs include topography modification of one or more metal surfaces of semiconductor devices bonded together by the sintered silver joint. The sintered silver bonded EPSs include a first semiconductor device having a first metal surface, the first metal surface having a modified topography that has been chemically etched, grit blasted, uniaxial ground and/or grid sliced connected to a second semiconductor device which may also include a first metal surface with a modified topography, a silver plating layer on the first metal surface of the first semiconductor device and a silver plating layer on the first metal surface of the second semiconductor device and a sintered silver joint between the silver plating layers of the first and second semiconductor devices which bonds the first semiconductor device to the second semiconductor device.

Claims (44)

1. A sintered silver bonded electronic packaging subcomponent comprising:

a first electronic subcomponent comprising

a first substrate;

a first metal layer having a first metal surface and a second metal surface with the second metal surface formed on or connected to the first substrate, wherein the first metal surface includes a modified topography to increase a roughness of the first metal surface, wherein the modified topography of the first metal surface of the first metal layer is uniaxially ground, grid sliced, grit blasted or chemically etched; and

a first silver plating layer formed on the modified first metal surface, wherein the increased roughness of the modified first metal surface increases mechanical interlocking of the first silver plating to the modified surface of the first metal surface;

a second electronic subcomponent comprising

a second substrate;

a second metal layer having a first metal surface and a second metal surface with the second metal surface formed on or connected to the second substrate; and

a sintered silver joint connecting the first electronic subcomponent to the second electronic subcomponent at the first silver plating layer and the second metal layer.

2. The sintered silver bonded electronic packaging subcomponent of claim 1 further comprising a second silver plating layer formed on the first metal surface of the second metal layer such that the sintered silver joint connects the first electronic subcomponent to the second electronic subcomponent at the first and second silver plating layers.

3. The sintered silver bonded electronic packaging subcomponent of claim 1 wherein the first metal surface of the second metal layer includes a modified topography to increase the roughness of the first metal surface of the second metal layer, wherein the increased roughness of the modified first metal surface of the second metal layer increases mechanical interlocking of the second silver plating to the modified surface of the first metal surface of the second metal layer.

4. The sintered silver bonded electronic packaging subcomponent of claim 1 wherein the modified topography of the first metal surface of the first metal layer is uniaxially ground.

5. The sintered silver bonded electronic packaging subcomponent of claim 3 wherein the modified topography of the first metal surface of the second metal layer is uniaxially ground.

6. The sintered silver bonded electronic packaging subcomponent of claim 1 wherein the modified topography of the first metal surface of the first metal layer is grid sliced.

7. The sintered silver bonded electronic packaging subcomponent of claim 3 wherein the modified topography of the first metal surface of the second metal layer is grid sliced.

8. The sintered silver bonded electronic packaging subcomponent of claim 1 wherein the modified topography of the first metal surface of the first metal layer is grit blasted.

9. The sintered silver bonded electronic packaging subcomponent of claim 3 wherein the modified topography of the first metal surface of the second metal layer is grit blasted.

10. The sintered silver bonded electronic packaging subcomponent of claim 6 wherein the modified topography of the first metal surface of the first metal layer is grid sliced in a crisscross configuration.

11. The sintered silver bonded electronic packaging subcomponent of claim 3 wherein the modified topography of the first metal surface of the second metal layer is chemically etched.

12. The sintered silver bonded electronic packaging subcomponent of claim 4 wherein the uniaxially ground first metal surface has uniaxial channels formed therein and the channels of the first electronic subcomponent first metal surface are positioned perpendicular to a tensile force direction to be experienced by the bonded first and second electronic subcomponents.

13. The sintered silver bonded electronic packaging subcomponent of claim 1 wherein the first electronic subcomponent comprises a direct bonded copper or a direct bonded aluminum device.

14. A sintered silver bonded electronic packaging subcomponent comprising:

a first electronic subcomponent comprising

a first substrate;

a first metal layer having a first metal surface and a second metal surface with the second metal surface formed on or connected to the first substrate, wherein the first metal surface includes a modified topography to increase a roughness of the first metal surface; and

a first silver plating layer formed on the modified first metal surface, wherein the increased roughness of the modified first metal surface increases mechanical interlocking of the first silver plating to the modified surface of the first metal surface;

a second electronic subcomponent comprising

a second substrate;

a second metal layer having a first metal surface and a second metal surface with the second metal surface formed on or connected to the first substrate, wherein the first metal surface of the second metal layer includes a modified topography to increase a roughness of the first metal surface of the second metal layer;

a second silver plating layer formed on the modified first metal surface of the second metal layer, wherein the increased roughness of the modified first metal surface of the second metal layer increases mechanical interlocking of the second silver plating to the modified surface of the first metal surface of the second metal layer;

a sintered silver joint connecting the first electronic subcomponent to the second electronic subcomponent at the first silver plating layer and the second metal layer; and

wherein the sintered silver joint has a higher shear strength as compared to a sintered silver joint of the first electronic subcomponent connected to the second electronic subcomponent having unmodified first metal surfaces of the first and the second metal layers.

15. A method of bonding electronic subcomponents comprising:

providing a first electronic subcomponent comprising a substrate, a first metal layer having a first metal surface and a second metal surface with the second metal surface formed on or connected to the substrate;

modifying the topography of the first metal surface of the first metal layer;

providing a second electronic subcomponent having a second metal layer having a first metal surface and a second metal surface;

applying a silver paste to the first metal surface of the first or the second electronic subcomponent;

pressing the second electronic subcomponent to the first electronic subcomponent with the silver paste therebetween; and

sintering the first and second electronic subcomponents with the silver paste therebetween forming a sintered silver joint connecting the first electronic subcomponent to the second electronic subcomponent.

16. The method of claim 15 further comprising plating the first metal surfaces of the first and second metal layers before applying the silver paste thereto.

17. The method of claim 16 further comprising modifying the first metal surface of the first metal layer by uniaxially grinding the first metal surface before plating the first metal surface.

18. The method of claim 16 further comprising modifying the first metal surface of the first metal layer by grit blasting the first metal surface before plating the first metal surface.

19. The method of claim 16 further comprising modifying the first metal surface of the first metal layer by grid slicing the first metal surface before plating the first metal surface.

20. The method of claim 19 further comprising modifying the first metal surface of the first metal layer by grid slicing the first metal surface in a crisscross pattern.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2013
From: WERESZCZAK, ANDREW A.
To: UT-BATTELLE, LLC
Reel/Frame 030539/0050 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2013
From: WERESZCZAK, ANDREW A.
To: UT-BATTELLE, LLC
Reel/Frame 030380/0221 →
CONFIRMATORY LICENSE Recorded May 2, 2013
From: UT-BATTELLE, LLC
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 030335/0105 →