On-die programmable fuses
View Patent ↗In one embodiment described herein, on-die programmable fuses may be used. On-die programmable fuses may be programmed by entities other than the chip manufacturer after the fuse array chip has been manufactured and shipped out. However, other non-volatile memories may also be used.
1. A computer executed method comprising:
programming a fuse array on a die using a programmer on said die;
providing a first string of bits to record a fuse state, including at least one complement bit; and
storing said first string along a addressable line in said array and storing a second string that is a complement of the first string along a second addressable line in said array so that one of said first and second strings is stored in a row while the other string is stored in a column.
2. The method of claim 1 including selecting fuse addresses in a first fuse array that has an on-die programmable fuse array and including a second fuse array that is only accessible separately from said first fuse array.
3. The method of claim 1 including enabling one of a plurality of interfaces to provide signals to said programmer.
4. The method of claim 3 including preventing more than one interface from providing signals at the same time to said programmer.
5. The method of claim 3 including enabling said interfaces to use different programming voltages or programming durations.
6. The method of claim 1 further including receiving a bit to store and creating a multi-bit first string from said bit.
7. The method of claim 6 including reading the row and extracting the bit and reading the column.
8. An apparatus comprising:
a fuse array;
a first fuse controller to enable a fuse manufacturer to program said fuse array;
a second fuse controller, isolated from said first fuse controller, said second fuse controller to allow a user to program said fuse array; and
a control to store a value along a first addressable line in said array as a string of bits of at least two different states and to store a complement string along a second addressable line in said array perpendicular to said first addressable line.
9. The apparatus of claim 8 , said apparatus to receive a bit to store and create a multi-bit first string from said bit.
10. The apparatus of claim 9 , said control to read the row and extracting the bit and reading the column.
11. The apparatus of claim 10 , said control to compare the code and its complement.
12. The apparatus of claim 11 , said control to reject the code if the first and second strings do not match as code and code complement.
13. The apparatus of claim 8 , said control to randomly select a fuse address to begin fuse sensing.
14. The apparatus of claim 8 wherein said fuse array is an on-die programmable fuse array.
15. The apparatus of claim 8 including a second array that is not on-die programmable, said first and second arrays being accessed using different passwords.
16. The apparatus of claim 8 including firmware and a module to update said firmware.
17. The apparatus of claim 8 , said control to enable one of a plurality of interfaces to provide signals to said programmer.
18. The apparatus of claim 17 , said control to prevent more than one interface from providing signals at the same time to said programmer.
19. The method apparatus of claim 18 , said control to enable aid interfaces to use different programming voltages or programming durations.
20. One or more non-transitory computer readable media storing instructions to enable a processor to perform a sequence comprising:
programming a fuse array using an on-die programmer;
providing a first string of bits to record a fuse state, including at least one complement bit; and
storing said first string along a addressable line in said array and storing a second string that is a complement of the first string along a second addressable line in said array so that one of said first and second strings is stored in a row while the other string is stored in a column.
21. The media of claim 20 , said sequence to select fuse addresses in a first fuse array that has an on-die programmable fuse array and including a second fuse array that is only accessible separately from said first fuse array.
22. The media of claim 21 , said sequence to enable one of a plurality of interfaces to provide signals to said programmer.
23. The media of claim 20 , said sequence to prevent more than one interface from providing signals at the same time to said programmer.
24. The media of claim 21 , said sequence to enable said interfaces to use different programming voltages or programming durations.
25. An apparatus comprising:
a first fuse array;
a second fuse array that is not on-die programmable, said first and second fuse arrays being accessed using different passwords;
a first fuse controller to enable a fuse manufacturer to program said first fuse array; and
a second fuse controller, isolated from said first fuse controller, said second fuse controller to allow a user to program said first fuse array.
26. An apparatus comprising:
a fuse array;
a first fuse controller to enable a fuse manufacturer to program said fuse array;
a second fuse controller, isolated from said first fuse controller, said second fuse controller to allow a user to program said fuse array; and
a control to store a value along a first addressable line in said fuse array as a string of bits of at least two different states and to store a complement string in a second addressable line in said fuse array perpendicular to said first addressable line.
27. The apparatus of claim 26 , said control to enable one of a plurality of interfaces to provide signals to said programmer.
28. The apparatus of claim 27 , said control to prevent more than one interface from providing signals at the same time to said programmer.
29. The apparatus of claim 28 , said control to enable aid interfaces to use different programming voltages or programming durations.