TWO-SIDED DIE IN A FOUR-SIDED LEADFRAME BASED PACKAGE
A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. In embodiments, a semiconductor die having die bond pads along two adjacent edges may be electrically coupled to four sides of a four-sided leadframe. Embodiments relate to lead and no-lead type leadframe.
1 . A leadframe for receiving a semiconductor die having die bond pads along a first edge of the semiconductor die, the leadframe comprising:
a first set of electrical terminals on a first side of the leadframe positioned adjacent to the die bond pads along the first edge of the semiconductor die; and
a second set of electrical terminals on a second side of the leadframe adjacent and perpendicular to the first side of the leadframe, the second set of electrical terminals including ends extending to and positioned adjacent to the die bond pads along the first edge of the semiconductor die.
2 . The leadframe of claim 1 , wherein the second set of electrical terminals extend in from the second side of the leadframe and then out toward the first side of the leadframe.
3 . The leadframe of claim 1 , wherein the leadframe is a QFN-type leadframe.
4 . A leadframe for receiving a semiconductor die having die bond pads along a first edge, the leadframe comprising:
a first side of the leadframe lying adjacent the first edge of the semiconductor die;
a first set of electrical leads on the first side of the leadframe, the first set of electrical leads including first ends positioned to terminate proximate to the die bond pads along the first edge of the semiconductor die; and
a second side of the leadframe adjacent the first side of the leadframe;
a second set of electrical leads on the second side of the leadframe, the second set of electrical leads being longer than the first set of electrical leads and the second set of electrical leads including first ends positioned to terminate proximate to the bond pads on the first edge of the semiconductor die.
5 . The leadframe of claim 4 , wherein the second set of electrical leads protrude from the second side of the leadframe into a center portion of the leadframe and then out toward the first side of the leadframe.
6 . The leadframe of claim 4 , the semiconductor die further including electrical leads along a second edge of the semiconductor die adjacent the first edge, the leadframe further comprising:
a third side of the leadframe lying adjacent the second edge of the semiconductor die;
a third set of electrical leads on the third side of the leadframe, the third set of electrical leads including first ends positioned to terminate proximate to the die bond pads along the second edge of the semiconductor die; and
a fourth side of the leadframe adjacent the third side of the leadframe;
a fourth set of electrical leads on the fourth side of the leadframe, the fourth set of electrical leads being longer than the third set of electrical leads and the fourth set of electrical leads including first ends positioned to terminate proximate to the bond pads on the second edge of the semiconductor die.
7 . The leadframe of claim 6 , wherein the fourth set of electrical leads emanate from the fourth side of the leadframe into a center portion of the leadframe and then out toward the third side of the leadframe.
8 . The leadframe of claim 6 , wherein the second and fourth groups of electrical leads are mirror images of each other.
9 . The leadframe of claim 4 , wherein the leadframe is for a TSOP, PSOP or SSOP.
10 . A leadframe for receiving a semiconductor die having die bond pads along a first edge, the leadframe comprising:
a first side of the leadframe lying adjacent the first edge of the semiconductor die;
a second side of the leadframe adjacent the first side of the leadframe;
a third side of the leadframe adjacent the second side of the leadframe;
a fourth side of the leadframe adjacent the third and first sides of the leadframe;
a first set of electrical leads on the first side of the leadframe, the first set of electrical leads including first ends positioned to terminate proximate to the die bond pads along the first edge of the semiconductor die; and
a second set of electrical leads on the second side of the leadframe, the second set of electrical leads including first portions extending from the second side of the leadframe toward the fourth side the leadframe, and second portions extending from the first portions toward the first side of the leadframe, the second portions of the second set of electrical leads including ends positioned to terminate proximate to the bond pads on the first edge of the semiconductor die.
11 . The leadframe of claim 10 , the semiconductor die further including electrical leads along a second edge of the semiconductor die adjacent the first edge, the leadframe further comprising:
a third set of electrical leads on the third side of the leadframe, the third set of electrical leads including first ends positioned to terminate proximate to the die bond pads along the second edge of the semiconductor die; and
a fourth set of electrical leads on the fourth side of the leadframe, the fourth set of electrical leads including first portions extending from the fourth side of the leadframe toward the second side the leadframe, and second portions extending from the first portions toward the third side of the leadframe, the second portions of the fourth set of electrical leads including ends positioned to terminate proximate to the bond pads on the second edge of the semiconductor die.
12 . The leadframe of claim 11 , wherein the second and fourth sets of electrical leads are mirror images of each other about a diagonal between the first and second sides and the third and fourth sides of the leadframe.
13 . The leadframe of claim 10 , wherein the leadframe is for a TSOP, PSOP or SSOP.