IP Library Granted Patent US 9,379,315
Granted Patent B2
US 9,379,315 · App. 13/797,185 · Granted Jun 28, 2016

Memory cells, methods of fabrication, semiconductor device structures, and memory systems

Inventors: Wei Chen (White Plains, NY); Sunil Murthy (White Plains, NY); Witold Kula (Gilroy, CA)
Assignee: Micron Technology, Inc.
H01L43/12H01L43/08
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Quick Facts
Patent No.
US 9,379,315
App. No.
13/797,185
Granted
Jun 28, 2016
Kind
B2
Abstract

Magnetic memory cells, methods of fabrication, semiconductor device structures, and memory systems are disclosed. A magnetic cell core includes at least one magnetic region (e.g., a free region or a fixed region) configured to exhibit a vertical magnetic orientation, at least one oxide-based region, which may be a tunnel junction region or an oxide capping region, and at least one magnetic interface region, which may comprise or consist of iron (Fe). In some embodiments, the magnetic interface region is spaced from at least one oxide-based region by a magnetic region. The presence of the magnetic interface region enhances the perpendicular magnetic anisotropy (PMA) strength of the magnetic cell core. In some embodiments, the PMA strength may be enhanced more than 50% compared to that of the same magnetic cell core structure lacking the magnetic interface region.

Claims (52)

1. A memory cell comprising:

a magnetic cell core on a substrate, the magnetic cell core comprising:

a free region between an oxide region and another oxide region, the free region exhibiting a switchable, vertical magnetic orientation; and

a magnetic interface region between the oxide region and the another oxide region, the magnetic interface region consisting of iron and defining a thickness of less than about ten angstroms, the magnetic interface region being thinner than regions of the magnetic cell core neighboring the magnetic interface region,

the oxide region being an electrically insulative region disposed between and external to the free region and a fixed region exhibiting a fixed, vertical magnetic orientation, the oxide region spaced from the magnetic interface region.

2. The memory cell of claim 1 , wherein the magnetic interface region is disposed directly between the free region and the another oxide region.

3. The memory cell of claim 1 , wherein the fixed region is spaced from the free region by the oxide region.

4. The memory cell of claim 3 , wherein the magnetic interface region is disposed above the free region and the fixed region.

5. The memory cell of claim 1 , wherein the free region comprises iron and at least one of cobalt and boron.

6. The memory cell of claim 1 , wherein the magnetic interface region is disposed within the free region.

7. The memory cell of claim 6 , wherein the magnetic interface region is disposed between magnetic sub-regions of the free region.

8. The memory cell of claim 1 , further comprising another magnetic interface region.

9. The memory cell of claim 1 , wherein the free region exhibits a perpendicular magnetic anisotropy of greater than about 4,000 Oersted.

10. A memory cell comprising:

a magnetic cell core comprising:

a free region configured to exhibit a switchable vertical magnetic orientation;

a fixed region configured to exhibit a fixed vertical magnetic orientation;

a nonmagnetic region between the free region and the fixed region; and

a magnetic interface region spaced from the nonmagnetic region by one of the free region and the fixed region.

11. The memory cell of claim 10 , wherein the nonmagnetic region comprises an oxide of magnesium, aluminum, or titanium.

12. The memory cell of claim 10 , wherein the magnetic interface region has a thickness of about 3 Angstroms to about 4 Angstroms.

13. The memory cell of claim 10 , wherein the magnetic cell core further comprises another magnetic interface region contacting at least one of the free region and the fixed region.

14. A method of forming a memory cell, the method comprising:

forming a magnetic material over a substrate;

forming an oxide material over the magnetic material;

forming another magnetic material over the oxide material;

forming another oxide material over the another magnetic material;

forming, by magnetron sputtering, a material consisting of iron, to a thickness of less than about ten angstroms, between the another magnetic material and one of the oxide material and the another oxide material but not in contact with the oxide material; and

patterning the magnetic material, the oxide material, the another magnetic material, the another oxide material, and the material consisting of the iron to form a magnetic cell core on the substrate, the magnetic cell core comprising:

a free region formed from one of the magnetic material and the another magnetic material;

a fixed region formed from another of the magnetic material and the another magnetic material;

an electrically insulating oxide region disposed between and external to the free region and the fixed region and formed from the oxide material;

a magnetic interface region formed from the material consisting of the iron; and

another oxide region disposed above the free region and the fixed region and formed from the another oxide material,

the free region disposed between the electrically insulating oxide region and the another oxide region,

the free region exhibiting a switchable, vertical magnetic orientation,

the fixed region exhibiting a fixed, vertical magnetic orientation,

the magnetic interface region disposed between the oxide region and the another oxide region, the magnetic interface region consisting of the iron and defining the thickness of less than about ten angstroms, the magnetic interface region being thinner than regions of the magnetic cell core neighboring the magnetic interface region,

the electrically insulating oxide region spaced from the magnetic interface region.

15. The method of claim 14 , further comprising annealing the oxide material, the magnetic material, the another oxide material, and the material consisting of the iron.

16. A semiconductor device structure, comprising:

a spin torque transfer magnetic random access memory (STT-MRAM) array comprising:

a plurality of STT-MRAM cells, each STT-MRAM cell of the plurality comprising:

a cell core comprising:

an electrically insulative nonmagnetic region between a free region and a fixed region, each of the free region and the fixed region configured to exhibit a vertical magnetic orientation;

an oxide region spaced from the electrically insulative nonmagnetic region by one of the free region and the fixed region; and

a magnetic interface region between the oxide region and the electrically insulative nonmagnetic region, the magnetic interface region consisting of iron, not contacting the electrically insulative nonmagnetic region, and defining a thickness of less than about ten angstroms that is less than a thickness of the free region.

17. A spin torque transfer magnetic random access memory (STT-MRAM) system, comprising:

a magnetic cell core comprising:

a magnetic interface region of a thickness of less than about ten angstroms on or in a free region of a thickness of about fifteen angstroms to about thirty angstroms, the magnetic interface region consisting of iron, the free region configured to exhibit a switchable vertical magnetic orientation; and

an electrically insulative oxide region spaced from the magnetic interface region, the electrically insulative oxide region disposed between the free region and a fixed region, the fixed region exhibiting a fixed vertical magnetic orientation; and

a plurality of conductive materials in operable communication with the magnetic cell core.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2013
From: CHEN, WEI; MURTHY, SUNIL; KULA, WITOLD
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030084/0814 →
Continuity (1)
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