IP Library Granted Patent US 9,323,498
Granted Patent B2
US 9,323,498 · App. 13/800,709 · Granted Apr 26, 2016

Multiplier circuit with dynamic energy consumption adjustment

Inventor: Nam Sung Kim (Middleton, WI)
Assignee: Wisconsin Alumni Research Foundation
G06F7/49942G06F7/53
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Quick Facts
Patent No.
US 9,323,498
App. No.
13/800,709
Granted
Apr 26, 2016
Kind
B2
Abstract

A fixed point multiplier that can be used in mobile computer systems operating under limited power constraints provides a trade-off between computational accuracy and energy consumption that may be changed dynamically for energy conservation purposes. In one embodiment, the multiplier pre-stores multiplication shift coefficients to eliminate leading-one circuitry normally used in shift and accumulate multipliers.

Claims (19)

1. An electronic computer system comprising:

a processor providing for execution of arithmetic and logic instructions and including a fixed point multiplier circuit for multiplication of data values, wherein the multiplier circuit provides a variable accuracy; and

an accuracy controller communicating with the multiplier circuit to change the accuracy of the multiplier circuit during execution of instructions by the processor.

2. The electronic computer system of claim 1 wherein the multiplier circuit consumes less electrical energy at lower accuracies.

3. The electronic computer system of claim 2 wherein the accuracy controller responds to instructions received by the processor core explicitly changing accuracy of the multiplier.

4. The electronic computer system of claim 2 wherein the accuracy controller monitors a power consumption of the processor core to change accuracy of the multiplier as a function of power consumption.

5. The electronic computer system of claim 2 wherein the accuracy controller varies the accuracy of the multiplier circuit while monitoring an effect of the accuracy variation to provide a closed loop accuracy control of the multiplier circuit changing dynamically during operation of the processor core.

6. The electronic computer system of claim 2 wherein the multiplier employs a multiply and accumulate process with varying numbers of iterations of multiply and accumulate to provide variable accuracy as a function of the number of iterations.

7. The electronic computer system of claim 6 wherein the multiplication is provided by a shifting of a multiplicand datum based on a leading-one detection of the multiplier datum.

8. The electronic computer system of claim 6 further including a coefficient memory holding stored pre-processed values indicating successive locations of ones in given multiplier data and wherein the multiplication is provided by shifting of a multiplicand datum based on the stored values in the coefficient memory for the given multiplier data.

9. The electronic computer system of claim 1 further including a memory holding a stored program employing repeated multiplications to implement at least one of an artificial neural network, liquid state machine, and support vector machine.

10. The electronic computer system of claim 1 further including a memory holding a program providing at least one of signal processing applications including classification and recognition applications, and wherein the multiplier provides multiplications of predetermined coefficients to data received by a human machine interface.

11. The electronic computer system of claim 1 further including:

a human machine interface;

a memory; and

a battery providing power to the human machine interface, the memory, and the processor core.

12. The electronic processor of claim 11 further including a human machine interface processing system providing a confidence value indicating a confidence in deriving a symbol from an interaction by a user with the human machine wherein the accuracy controller receives the confidence value and changes accuracy of the multiplier circuit as a function of the confidence value to increase accuracy as the confidence value decreases.

13. The electronic computer system of claim 1 further comprising a power management circuit, wherein the power management circuit monitors the charge state of a power source, and wherein the accuracy controller monitors a power control input from the power management circuit to change accuracy of the multiplier as a function of power consumption.

14. The electronic computer system of claim 13 wherein the power source is a battery.

Assignments (2)
CONFIRMATORY LICENSE Recorded Aug 8, 2013
From: WISCONSIN ALUMNI RESEARCH FOUNDATION
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 030985/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2013
From: KIM, NAM SUNG
To: WISCONSIN ALUMNI RESEARCH FOUNDATION
Reel/Frame 030141/0395 →
Continuity (1)
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