Thin film transistor array substrate and organic light-emitting diode display
A thin film transistor (TFT) array substrate includes: a substrate; a first insulation layer on the substrate; a capacitor including a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode and having an opening, and the upper electrode is insulated from the lower electrode by a second insulation layer; an inter-layer insulation film covering the capacitor; a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening; and a connection node on the inter-layer insulation film and electrically coupling the lower electrode and at least one TFT to each other through the node contact hole.
1. A thin film transistor (TFT) array substrate comprising:
a substrate;
a first insulation layer on the substrate;
a capacitor comprising a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode, the upper electrode extending beyond an edge of the lower electrode and having an opening, wherein the upper electrode is insulated from the lower electrode by a second insulation layer;
an inter-layer insulation film covering the capacitor;
a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening; and
a connection node on the inter-layer insulation film and electrically coupling the lower electrode and at least one TFT to each other through the node contact hole.
2. The TFT array substrate of claim 1 , wherein the opening overlaps with the lower electrode.
3. A thin film transistor (TFT) array substrate comprising:
a substrate;
a first insulation layer on the substrate;
a capacitor comprising a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode and having an opening, wherein the upper electrode is insulated from the lower electrode by a second insulation layer;
an inter-layer insulation film covering the capacitor;
a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening; and
a connection node on the inter-layer insulation film and electrically coupling the lower electrode and at least one TFT to each other through the node contact hole,
wherein the upper electrode is configured to receive a driving voltage through a driving voltage line formed from the same layer as the connection node.
4. The TFT array substrate of claim 3 , wherein the driving voltage line is coupled to the upper electrode through another contact hole in the inter-layer insulation film.
5. A thin film transistor (TFT) array substrate comprising:
a substrate;
a first insulation layer on the substrate;
a capacitor comprising a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode and having an opening, wherein the upper electrode is insulated from the lower electrode by a second insulation layer;
an inter-layer insulation film covering the capacitor;
a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening;
a connection node on the inter-layer insulation film and electrically coupling the lower electrode and at least one TFT to each other through the node contact hole; and
a driving TFT arranged to overlap with the capacitor,
wherein a driving gate electrode of the driving TFT comprises the lower electrode.
6. The TFT array substrate of claim 5 , wherein the at least one TFT comprises a compensation TFT coupled to the driving TFT and electrically coupled to the lower electrode through the connection node, and wherein the compensation TFT is configured to compensate for a threshold voltage of the driving TFT.
7. The TFT array substrate of claim 6 , wherein a compensation gate electrode of the compensation TFT is formed from the same layer as the lower electrode.
8. The TFT array substrate of claim 5 , wherein the at least one TFT comprises an initialization TFT electrically coupled to the lower electrode through the connection node, and wherein the initialization TFT is configured to provide an initialization voltage to the driving gate electrode of the driving TFT by being turned on in response to a previous scan signal.
9. The TFT array substrate of claim 8 , wherein an initialization gate electrode of the initialization TFT is formed from the same layer as the lower electrode.
10. An organic light-emitting diode (OLED) display comprising:
a substrate;
a first insulation layer on the substrate;
a scan line on the first insulation layer and configured to deliver a scan signal;
a data line and a driving voltage line crossing the scan line, the data line and the driving voltage line being insulated by a second insulation layer and an inter-layer insulation film and configured to respectively deliver a data signal and a driving voltage;
a pixel circuit coupled to the scan line and the data line and comprising at least one thin film transistor (TFT) and a capacitor;
an OLED for emitting light by receiving the driving voltage from the pixel circuit,
wherein the capacitor comprises a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode, the upper electrode extending beyond an edge of the lower electrode and having an opening, wherein the upper electrode is insulated from the lower electrode by the second insulation layer;
a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening; and
a connection node on the inter-layer insulation film and electrically coupling the lower electrode and the at least one TFT to each other through the node contact hole.
11. The OLED display of claim 10 , wherein the opening overlaps with the lower electrode.
12. An organic light-emitting diode (OLED) display comprising:
a substrate;
a first insulation layer on the substrate;
a scan line on the first insulation layer and configured to deliver a scan signal;
a data line and a driving voltage line crossing the scan line, the data line and the driving voltage line being insulated by a second insulation layer and an inter-layer insulation film and configured to respectively deliver a data signal and a driving voltage;
a pixel circuit coupled to the scan line and the data line and comprising at least one thin film transistor (TFT) and a capacitor;
an OLED for emitting light by receiving the driving voltage from the pixel circuit, wherein the capacitor comprises a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode and having an opening,
wherein the upper electrode is insulated from the lower electrode by the second insulation layer;
a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening; and
a connection node on the inter-layer insulation film and electrically coupling the lower electrode and the at least one TFT to each other through the node contact hole, wherein the upper electrode is configured to receive a driving voltage through a driving voltage line formed from the same layer as the connection node.
13. The OLED display of claim 12 , wherein the driving voltage line is coupled to the upper electrode through another contact hole in the inter-layer insulation film.
14. An organic light-emitting diode (OLED) display comprising:
a substrate;
a first insulation layer on the substrate;
a scan line on the first insulation layer and configured to deliver a scan signal;
a data line and a driving voltage line crossing the scan line, the data line and the driving voltage line being insulated by a second insulation layer and an inter-layer insulation film and configured to respectively deliver a data signal and a driving voltage;
a pixel circuit coupled to the scan line and the data line and comprising at least one thin film transistor (TFT) and a capacitor;
an OLED for emitting light by receiving the driving voltage from the pixel circuit,
wherein the capacitor comprises a lower electrode on the first insulation layer, and an upper electrode arranged to overlap with the whole lower electrode and having an opening, wherein the upper electrode is insulated from the lower electrode by the second insulation layer;
a node contact hole in the inter-layer insulation film and the second insulation layer, and within the opening;
a connection node on the inter-layer insulation film and electrically coupling the lower electrode and the at least one TFT to each other through the node contact hole; and
a driving TFT arranged to overlap with the capacitor, wherein a driving gate electrode of the driving TFT comprises the lower electrode.
15. The OLED display of claim 14 , wherein the at least one TFT comprises a compensation TFT coupled to the driving TFT and electrically coupled to the lower electrode through the connection node, and wherein the compensation TFT is configured to compensate for a threshold voltage of the driving TFT.
16. The OLED display of claim 15 , wherein a compensation gate electrode of the compensation TFT is formed from the same layer as the lower electrode.
17. The OLED display of claim 14 , wherein the at least one TFT comprises an initialization TFT electrically coupled to the lower electrode through the connection node, and wherein the initialization TFT is configured to provide an initialization voltage to the driving gate electrode of the driving TFT by being turned on in response to a previous scan signal.
18. The OLED display of claim 17 , wherein an initialization gate electrode of the initialization TFT is formed from the same layer as the lower electrode.
19. The OLED display of claim 14 , further comprising a switching TFT for delivering the data signal to the driving TFT by being turned on by the scan signal.