Programmable matrix for the allocation of communication resources
In an embodiment of the present invention, a programmable matrix is provided for flexibly allocating communication resources among functional circuit blocks. For example, in an embodiment of the present invention, a programmable matrix is provided that allocations communications channels such as transceiver channels among various PCIe hard IP blocks that may be contained within a programmable logic device (PLD).
1. An integrated circuit, comprising:
a first set of functional circuit blocks wherein each of the functional circuit blocks requires at least one transceiver communication channel;
a first set of transceiver communication channels; and
a programmable matrix configured to couple the first set of transceiver communication channels among the first set of functional circuit blocks.
2. The integrated circuit of claim 1 , wherein the programmable matrix is configured to couple only a number of transceiver communication channels that is necessary for the operation of each functional circuit block within the first set of functional circuit blocks.
3. The integrated circuit of claim 1 , wherein the first set of functional circuit blocks includes hard intellectual property circuit blocks.
4. The integrated circuit of claim 1 , wherein the first set of functional circuit blocks includes a Peripheral Component Interconnect Express (PCIe) block.
5. The integrated circuit of claim 1 , wherein the programmable matrix comprises logic switching circuitry.
6. The integrated circuit of claim 1 , wherein the programmable matrix is implemented in a programmable logic device (PLD).
7. An integrated circuit configured as a programmable logic device, comprising:
programmable logic;
programmable interconnect;
a first set of functional circuit blocks wherein each of the functional circuit blocks requires at least one transceiver communication channel;
a first set of transceiver communication channels; and
a programmable matrix configured to couple the first set of transceiver communication channels among the first set of functional circuit blocks.
8. The integrated circuit of claim 7 , wherein the programmable matrix is configured to couple only a number of transceiver communication channels that is necessary for the operation of each functional circuit block within the first set of functional circuit blocks.
9. The integrated circuit of claim 7 , wherein the first set of functional circuit blocks includes hard intellectual property circuit blocks.
10. The integrated circuit of claim 7 , wherein the first set of functional circuit blocks includes a Peripheral Component Interconnect Express (PCIe) block.
11. The integrated circuit of claim 7 , wherein the programmable matrix comprises logic switching circuitry.
12. The integrated circuit of claim 7 , wherein at least a portion of the programmable matrix is implemented within the programmable logic.
13. A digitally-implemented method for allocating transceiver communication channels in an integrated circuit, the method comprising:
receiving information regarding a total number of available transceiver communication channels in the integrated circuit;
determining a total number of required transceiver communication channels for a plurality of first type of circuit blocks within the integrated circuit;
for each first type of circuit blocks,
determining a number of required transceiver communication channels;
configuring a programmable matrix to allocate the required number of transceiver communication channels to the first type of circuit block.
14. The method of claim 13 , determining whether the total number of required transceiver communication channels exceeds the total number of available transceiver communication channels.
15. The method of claim 14 , further comprising setting an error flag.
16. The method of claim 13 , wherein the required number of transceiver communication channels are allocated in an ordered manner.
17. The method of claim 13 , wherein the required number of transceiver communication channels are allocated in a random manner.
18. The method of claim 13 , further comprising, for each first type of circuit block, using the programmable matrix to couple the required number of transceiver communication channels to the first type of circuit block.
19. A digitally-implemented method for allocating transceiver communication channels in an integrated circuit, the method comprising:
allocating a number of available transceiver communication channels in the integrated circuit among a plurality of first type of circuit blocks within the integrated circuit;
determining a number of unused transceiver communication channels from among the allocated number of available transceiver communication channels;
for each first type of circuit blocks,
determining whether the first type of circuit block can make use of a set of unused transceiver communication channels beyond those already allocated to the first type of circuit block;
configuring a programmable matrix to allocate the set of unused transceiver communication channels to the first type of circuit block.
20. The method of claim 19 , wherein the required unused transceiver communication channels are allocated in an ordered manner.
21. The method of claim 19 , wherein the unused transceiver communication channels are allocated in a random manner.
22. The method of claim 19 , further comprising, for each first type of circuit block, using the programmable matrix to couple the set of unused transceiver communication channels to the first type of circuit block.